Yih-Feng Chyan

Suppression of reverse short channel effect by high energy implantation

This study demonstrates the almost complete suppression of reverse short channel effect (RSCE) in a technology using high energy implanted tubs, compared to a technology using a conventional diffused tub. The conventional and high energy implanted (HEI) process flows have identical source/drain processing. The suppression of RSCE is explained by differences in implant-induced boron pile-up at the silicon-gate oxide interface during tub annealing and source/drain annealing. The laterally uniform pile-up induced by annealing the high energy implants inhibits the nonuniform pile-up induced by annealing the source/drain implants. The RSCE was reduced from 100 mV in the conventional process to an insignificant 10 mV in the HEI process.

A 0.16 /spl mu/m modular BiCMOS (COM2-BiCMOS) technology for RF communication ICs

A 0.16 /spl mu/m modular BiCMOS technology (COM2-BiCMOS) has been developed for radio-frequency communication ICs. The technology includes a low-cost, high-performance, single-poly NPN bipolar transistor with f/sub T/=45 GHz and BV/sub CEO/=4.0 V. With a f/sub T/BV/sub CEO/ product of 180 GHz-V, the bipolar transistor performance in COM2-BiCMOS is comparable to many double-poly Si or SiGe transistors without the additional process complexity and cost.