Yimeng Zhang

4H-SiC Trench MOSFET With L-Shaped Gate

A novel 4H-SiC trench metal-oxide-semiconductor field-effect transistor (MOSFET) with an L-shaped gate (LSG) is proposed and studied via numerical simulations in this letter. Adoption of an additional LSG region that surrounds the bottom corner of the trench allows the peak electric field in the SiO2 dielectric to be significantly relieved by charge compensation, and the device breakdown voltage can be greatly enhanced without causing significant degradation of the output characteristics. In high-voltage blocking states, the electric field at the bottom corner of the trench is weakened, which leads to improved device performance. The peak electric field value in the SiO2 dielectric decreases by 32.3% when compared with that of a conventional 4H-SiC trench MOSFET, while the breakdown voltage increases by 80.4%.

The effect of ions on the magnetic moment of vacancy for ion-implanted 4H-SiC

The structural properties and the spin states of vacancies in ion implanted silicon carbide samples are analyzed by experimental measurements along with first-principles calculations. Different types and dosages of ions (N+, O+, and B+) were implanted in the 4H-silicon carbide single crystal. The Raman spectra, positron annihilation spectroscopy, and magnetization-magnetic field curves of the implanted samples were measured. The fitting results of magnetization-magnetic field curves reveal that samples implanted with 1 × 1016 cm−2 N+ and O+ ions generate paramagnetic centers with various spin states of J = 1 and J = 0.7, respectively. While for other implanted specimens, the spin states of the paramagnetic centers remain unchanged compared with the pristine sample. According to the positron annihilation spectroscopy and first-principles calculations, the change in spin states originates from the silicon vacancy carrying a magnetic moment of 3.0 μB in the high dosage N-implanted system and 2.0 μB in the O-...

Fabrications and characterizations of high performance 1.2 kV, 3.3 kV, and 5.0 kV class 4H–SiC power SBDs*

In this paper, 1.2 kV, 3.3 kV, and 5.0 kV class 4H–SiC power Schottky barrier diodes (SBDs) are fabricated with three N-type drift layer thickness values of 10 μm, 30 μm, and 50 μm, respectively. The avalanche breakdown capabilities, static and transient characteristics of the fabricated devices are measured in detail and compared with the theoretical predictions. It is found that the experimental results match well with the theoretical calculation results and are very close to the 4H–SiC theoretical limit line. The best achieved breakdown voltages (BVs) of the diodes on the 10 μm, 30 μm, and 50 μm epilayers are 1400 V, 3320 V, and 5200 V, respectively. Differential specific-on resistances (R on−sp) are 2.1 mΩ cm2, 7.34 mΩcm2, and 30.3 mΩcm2, respectively.

Analysis of the thermal resistance and performance degradation of 4H-SiC PiN power diode

The excellent physical and electronic properties of SiC recently takes itself to be the focused power device material for high temperature high power and high frequency application. In this paper, the model is established through simulation method Ansys14.0, studying the factors affecting the thermal resistance of PiN diode. Increasing the area or decreasing the thickness of the chip and the solder layer can reduce the thermal resistance effectively. At last we give a thermodynamic model of the device in Sentaurus TCAD software, modeling the temperature phenomenon and self-heating effects on performance degradation of 4H-SiC PiN diode, finally we analysis and forecast the failure mechanism of similar SiC devices. Results show that the higher the temperature, the higher heat flux generated by the section of the device will be to promote temperature, and the smaller the temperature gradient inside and outside the device which leads heat conducted, hence resulting in increased current degradation.