Yin-Cheng Chang

A de-embedding method for extracting S-parameters of vertical interconnect in advanced packaging

An extracting methodology is proposed to characterize the performance of interconnect. This work successfully extracts the interconnect by using transmission matrix (T-matrix) for calculation. This method exhibits its validity without frequency limitation mathematically. It can deal with most kinds of vertical interconnects including bond-wires, micro-bumps and through-silicon-vias (TSVs). Details of equations and measurement procedure are reported in this work. The bump in flip-chip process is taken as an example. The analysis is depicted and the measured results are performed for verification up to 20 GHz.

A low phase-noise class-C VCO using novel 8-shaped transformer

A 9 GHz low phase noise class-C voltage controlled oscillator (VCOs) with an 8-shaped transformer configuration using 0.18-μm CMOS technology is presented. By utilizing the 8-shaped transformer, the proposed class-C VCO can be operated at reduced dc power consumption while maintaining circuit performance in terms of phase noise and limiting EMC (Electro-Magnetic Compatibility) issues when the symmetrical structures are considered. Consuming a dc current of 5.5 mA with the supply voltage of 1.8 V, the class-C VCO exhibits a frequency tuning range of 1.4 GHz, a phase noise of -117.4 dBc/Hz at 1 MHz offset frequency away from the 8.94 GHz carrier, and a figure of merit up to 186.4 dBc/Hz.

High phase accuracy on-wafer measurement for quadrature voltage-controlled oscillator

An on-wafer measurement technique is proposed to characterize the phase accuracy of QVCO. The procedure of calibration and measurement is illustrated in details. An I/Q phase error of a QVCO was precisely measured using the receiver mode of VNA. An on-chip Cal Kit was designed and fabricated for de-embedding system error. A 5 GHz QVCO was then tested to demonstrate the feasibility of measurement and showed excellent quadrature accuracy within 1deg.

A Fully Integrated Ku-Band Down-Converter Front-End For DBS Receivers

A fully integrated Ku-band down-converter front-end for digital broadcast satellite (DBS) receiver in a 0.18 μm SiGe BiCMOS technology is presented. To meet the specifications in different areas, the circuit can cover a wide RF range (10.7-13.45 GHz) with four LO frequencies, and down convert the RF signal to L-Band (950-2150 MHz). Compared with previous works, the presented down-converter using a low cost technology to achieve a low noise figure (<; 6 dB), high gain (> 51 dB), and high linearity (OP1dB > 5.5 dBm) under low power consumption (32 mA; 135 mW) with an excellent gain flatness (±1 dB) and a very small chip area (0.6 mm2). This is also the first report of the DBS down-converter covering four different LO frequencies, to the best of our knowledge.

Design of fully integrated receiver front-end for VSAT applications

A fully integrated receiver front-end for very small aperture terminal (VSAT) applications in a 0.18-μm SiGe BiCMOS technology is demonstrated. To satisfy different specifications of various applications, the proposed receiver can down-convert the input signal in a wide RF range from 9.8 to 14.8 GHz to the IF frequency at L-band (950-2150MHz) with four differences LO frequencies. The noise figure is better than 7 dB with an averaged conversion gain of 45.5 dB for the entire RF band. The receiver frontend circuit demonstrate a high linearity (OP1dB > 4.5 dBm) with an excellent gain flatness (±1.5 dB) under a low power consumption (150mW).

A BiCMOS monolithic Ka-band down-converter for satellite communication systems

A high performance Ka-band down-converter front-end for satellite communications in 0.18-μm BiCMOS is demonstrated. By using the dual-transformer-feedback design, the low-noise amplifier (LNA) can achieve low noise figure (NF) and wide matching bandwidth simultaneously. Also, the GM-boosted mixer together with the IF amplifier with adaptive bias and 3D inductor provides high gain and high linearity to relax the overall system requirements. The measured NF is lower than 6.25 dB with an average conversion gain of 47.5 dB covering the entire RF band from 18.2 to 21.4 GHz. A high linearity (OP1dB > 4.2 dBm) with an excellent gain flatness (±1.5dB) are achieved under a power consumption of only 80 mW. Compared with previously reported works, the presented design has the highest gain and linearity, lower NF, and a smallest chip size (core area: 0.24 mm2).

On-wafer single contact quadrature accuracy measurement using receiver mode in four-port vector network analyzer

This paper presents the calibration procedure using a five-port calibration kit based on receiver mode in vector network analyzer (VNA). After de-embedding the phase/amplitude errors from cal-kit, the quadrature phase accuracy and amplitude error of a quadrature voltage controlled oscillator (QVCO) can be directly obtained using on-wafer testing with a single contact. A 5 GHz QVCO was tested to demonstrate the feasibility of measurement. The I/Q mismatch on both phase and amplitude of the QVCO were precisely measured. Only single probe contact is required during the measurement that minimizes the uncertainty.

A Ku-band low-phase-noise transformer coupled VCO for satellite communications

A Ku-band voltage-controlled oscillator (VCO) with a low phase noise is presented in this paper. By increasing the third-harmonic of the fundamental frequency, the transformer-based topology can enforce a pseudo-square voltage waveform in the LC tank to reduce the phase noise. Implemented in a 90-nm standard CMOS technology, the VCO exhibits an average phase noise of -117.2 dc/Hz at 1 MHz offset over a 9.5-11.7 GHz tuning range. The oscillator only occupies 0.2 mm2 while drawing 13.3 mA from the 1.2-V power supply, and the achieved FoM is 185.4 dBc/Hz. The proposed VCO is suitable for applications of satellite communications.

Design of the multifunction IC-EMC test board with off-board probes for evaluating a microcontroller

A multifunction test board is designed for a microcontroller (MCU) testing. This board can be used to verify the function of the MCU by running several basic instructions. Furthermore, six different IC-EMC measurements complied with IEC standards can be performed on the same board by careful design and the preservation of test points with certified off-board probes. The experimental results show the capability of providing the confident measurements up to 1 GHz. Meanwhile, the cost of performing a bunch of different testing methods on implementing various test boards is reduced.

A V-band CPW bandpass filter with controllable transmission zeros in integrated passive devices (IPD) technology

A 60 GHz CPW bandpass filter (BPF) with two controllable transmission zeros is proposed. The BPF, which utilizes the spiral defected ground structure (DGS) and interdigital structure as the resonators, is designed and fabricated on the integrated passive device (IPD) technology. The proposed filter has the measured 3dB bandwidth of 8.53 GHz (56.54-65.07 GHz) with the insertion loss of 4.84 dB including pads. The center frequency is 60.81 GHz, and the maximum return loss is better than 25 dB in the passband. A good agreement between the simulated and measured results has been shown. By comparing to other reported Si-based V-band BPFs, this work achieves a good fractional BW (FBW) of 14% with a compact size of 0.18mm2.