Yong-Soon Lee
Samsung
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Publication
Featured researches published by Yong-Soon Lee.
SID Symposium Digest of Technical Papers | 2007
Seung-Hwan Moon; Yong-Soon Lee; Min-cheol Lee; Brian H. Berkeley; Nam-deog Kim; Sang Soo Kim
Integrated a-Si:H TFT gate driver circuits on large area TFT-LCDs are reviewed. A novel AC-biased holding circuit to stabilize the floating node of the shift register on the gate drivers is proposed to improve the driver reliability. Experimental confirmation validates that the new a-Si:H TFT gate drivers are highly reliable
SID Symposium Digest of Technical Papers | 2006
Yong-Soon Lee; Haeng-Won Park; Seung-Hwan Moon; Tae-Sung Kim; Ki-Chan Lee; Brian H. Berkeley; Sang Soo Kim
A new multiplexing technique has been developed which eliminates 2/3 of the TFT-LCD data lines and column drivers by rearranging horizontally-placed RGB pixels vertically. The method requires three times the number of gate drivers, which in turn are integrated in α-Si silicon onto the glass substrate. This new method has been successfully tested and verified on a 12.1-inch WXGA TFT-LCD panel using only two data driver ICs.
SID Symposium Digest of Technical Papers | 2008
Min-cheol Lee; Yong-Soon Lee; Seung-Hwan Moon; Dong-Gyu Kim; Kyung-seob Kim; Nam Deog Kim; Sang Soo Kim
HD and FHD LCD-TV panels have been implemented using integrated gate drivers. By removing external gate driver ICs, the number of driver ICs has been reduced to only 2 for a 32″ HD panel. A 46″ FHD 120Hz LCD-TV panel and a 40″ HD 60Hz panel have also been developed using integrated gate drivers.
international electronics manufacturing technology symposium | 1997
Yong-Soon Lee; J.H. Cho; Y.B. Sun; N.S. Kim
Bonding wire heel crack observed in large QFP was studied. From the analysis, it was found that this type of open failure was caused by heel crack at stitch bond during molding. The mold simulation was conducted for quantitative analysis. The software considers the polymerization kinetics of EMC since the mold flow depends on thermal excursion. According to simulation, it was proven that the EMC near gate shrinks with very steep gradient of conversion rate. At this moment the chemical shrinkage of EMC results in the fracture of Au wire due to the excessive tension. The mold simulation analysis coincides with experimental results. Both wire bonding and molding parameters were optimized to solve the heel crack problem. The heel crack resistance could be improved by using a capillary which makes large cross-sectional area of stitch bond. The other solution to suppress the heel crack was to use EMC having a smaller chemical shrinkage. Also an additional improvement was obtained by decreasing molding temperature from 175/spl deg/C to 168/spl deg/C. Conclusively, the chemical shrinkage of EMC is an important property and needs to be reduced to minimize the transfer molding failures, especially for the large body size packages.
Archive | 2010
Dong-Gyu Kim; Seung-Hwan Moon; Yong-Soon Lee; Nam-Soo Kang; Haeng-Won Park
Archive | 2006
Haeng-Won Park; Seung-Hwan Moon; Nam-Soo Kang; Yong-Soon Lee
Archive | 2017
Haeng-Won Park; Seung-Hwan Moon; Nam-Soo Kang; Sung-Jae Moon; Sung-man Kim; Seong-Young Lee; Yong-Soon Lee
Archive | 2005
Haeng-Won Park; Seung-Hwan Moon; Nam-Soo Kang; Yong-Soon Lee; Back-Won Lee
Archive | 2007
Yun-seok Choi; Yong-Soon Lee
Archive | 2009
Yong-Soon Lee