Yun-seok Choi

Power Delivery Network Design for 3D SIP Integrated over Silicon Interposer Platform

As mobile hand-held devices including mobile phone are required to provide multi-media services more and more, it is necessary that the various hardware including high speed memory, high capacity data storage device, and high performance logic processor are integrated into the limited volume, which results in high density 3D SIP. In this work, power delivery network for 3D SIP integrated on silicon interposer will be discussed. The silicon interposer used in 3D SIP includes integrated decoupling capacitor, which gives good power delivery performance.

3D printed RF passive components by liquid metal filling

We present three-dimensional (3D) micro-scale electrical components and systems by means of 3D printing and a liquid-metal-filling technique. The 3D supporting polymer structures with hollow channels and cavities are fabricated from inkjet printing. Liquid metals made of silver particles suspension in this demonstration are then injected into the hollow paths and solidified to form metallic elements and interconnects with high electrical conductivity. In the proof-of-concept demonstrations, various radio-frequency (RF) passive components, including 3D-shaped inductors, capacitors and resistors are fabricated and characterized. High-Q inductors and capacitors up to 1 GHz have been demonstrated. This work establishes an innovative way to construct arbitrary 3D electrical systems with efficient and labor-saving processes.

72.5GFLOPS 240Mpixel/s 1080p 60fps multi-format video codec application processor enabled with GPGPU for fused multimedia application

72.5GFLOPS GPGPU computing, 240 Mpixel/s sustainable image signal processing and 60fps 1080p multi-format video codec (MFC) capabilities are integrated with an 1.7GHz out-of-order-execution dual-core ARMv7A architecture CPU and 12.8GB/s memory subsystem for a next-generation application processor. The GPU-based general-purpose computing capability can deliver 10× higher energy efficiency in compute-intensive multimedia applications, compared with a CPU solution on the same die. The improved energy efficiency with GPGPU computing enables next-generation fused multimedia applications, with the assistance of dedicated high-performance low-power multimedia accelerators, as well as with low-power design and process technology, as shown in Fig. 9.4.1.

Model-order estimation and reduction of distributed interconnects via improved vector fitting

This paper introduces an automated method estimating and reducing the order of macromodel for fast transient simulation. The proposed method improves the vector fitting algorithm for extracting the reduced-order macromodel from the accurate macromodel having redundant poles and residues. The performance of the proposed method has been demonstrated through several test cases.

Self-assembled monolayer-assisted thin metal polishing for fabricating uniform 3D microstructures

A self-assembled monolayer (SAM) was actively used to improve the reproducibility and yield of micromachining technology. A harsh metal mechanical polishing process was replaced with a metal wet etching process by using a hexadecanethiol (HDT) SAM as an etch-protect mask. The fundamental results of the experiment show the excellent ability of the HDT SAM in protecting the gold from the gold wet etchant and the wide process margin. The proposed process, which was used to fabricate a 3D suspended inductor, greatly improves the process yield. The proposed micromachining technology with a SAM is expected to have a variety of applications for the highly reproducible and uniform fabrication of MEMS.

An all pixel PDAF CMOS image sensor with 0.64μmx1.28μm photodiode separated by self-aligned in-pixel deep trench isolation for high AF performance

We present a CMOS image sensor (CIS) with phase detection auto-focus (PDAF) in all pixels. The size of photodiode (PD) is 0.64μm by 1.28μm, the smallest ever reported and two PDs compose a single pixel. Inter PD isolation was fabricated by deep trench isolation (DTI) process in order to obtain an accurate AF performance. The layout and depth of DTI was optimized in order to eliminate side effects and maximize the performance even at extremely low light condition up to 1lux. In particular the AF performance remains comparable to that of 0.70μm dual PD CIS. By using our unique technology, it seems plausible to scale further down the size of pixels in dual PD CIS without sacrificing AF performance.