Yoon-Jin Kim

Resource Sharing and Pipelining in Coarse-Grained Reconfigurable Architecture for Domain-Specific Optimization

Coarse-grained reconfigurable architectures aim to achieve goals of both high performance and flexibility. However, existing reconfigurable array architectures require many resources without considering the specific application domain. Functional resources that take long latency and/or large area can be pipelined and/or shared among the processing elements. Therefore, the hardware cost and the delay can be effectively reduced without any performance degradation for some application domains. We suggest such a reconfigurable array architecture template and a design space exploration flow for domain-specific optimization. Experimental results show that our approach is much more efficient, in both performance and area, compared to existing reconfigurable architectures.

Power-conscious configuration cache structure and code mapping for coarse-grained reconfigurable architecture

Coarse-grained reconfigurable architecture aims to achieve both performance and flexibility. However, power consumption is no less important for the reconfigurable architecture to be used as a competitive processing core in embedded systems. In this paper, we show how power is consumed in a typical coarse-grained reconfigurable architecture. Based on the power breakdown data, we suggest a power-conscious configuration cache structure and code mapping technique, which reduce power consumption without performance degradation. Experimental results show that the proposed approach saves much power even with reduced configuration cache size

A spatial mapping algorithm for heterogeneous coarse-grained reconfigurable architectures

In this work, we investigate the problem of automatically mapping applications onto a coarse-grained reconfigurable architecture and propose an efficient algorithm to solve the problem. We formalize the mapping problem and show that it is NP-complete. To solve the problem within a reasonable amount of time, we divide it into three subproblems: covering, partitioning and layout. Our empirical results demonstrate that our technique produces nearly as good performance as hand-optimized outputs for many kernels

Dynamic Context Compression for Low-Power Coarse-Grained Reconfigurable Architecture

Most of the coarse-grained reconfigurable architectures (CGRAs) are composed of reconfigurable ALU arrays and configuration cache (or context memory) to achieve high performance and flexibility. Specially, configuration cache is the main component in CGRA that provides distinct feature for dynamic reconfiguration in every cycle. However, frequent memory-read operations for dynamic reconfiguration cause much power consumption. Thus, reducing power in configuration cache has become critical for CGRA to be more competitive and reliable for its use in embedded systems. In this paper, we propose dynamically compressible context architecture for power saving in configuration cache. This power-efficient design of context architecture works without degrading the performance and flexibility of CGRA. Experimental results show that the proposed approach saves up to 39.72% power in configuration cache with negligible area overhead (2.16%).

Human umbilical cord blood-stem cells direct macrophage polarization and block inflammasome activation to alleviate rheumatoid arthritis

Rheumatoid arthritis (RA) is a long-lasting intractable autoimmune disorder, which has become a substantial public health problem. Despite widespread use of biologic drugs, there have been uncertainties in efficacy and long-term safety. Mesenchymal stem cells (MSCs) have been suggested as a promising alternative for the treatment of RA because of their immunomodulatory properties. However, the precise mechanisms of MSCs on RA-related immune cells are not fully elucidated. The aim of this study was to investigate the therapeutic potential of human umbilical cord blood-derived MSCs (hUCB-MSCs) as a new therapeutic strategy for patients with RA and to explore the mechanisms underlying hUCB-MSC-mediated immunomodulation. Mice with collagen-induced arthritis (CIA) were administered with hUCB-MSCs after the onset of disease, and therapeutic efficacy was assessed. Systemic delivery of hUCB-MSCs significantly ameliorated the severity of CIA to a similar extent observed in the etanercept-treated group. hUCB-MSCs exerted this therapeutic effect by regulating macrophage function. To verify the regulatory effects of hUCB-MSCs on macrophages, macrophages were co-cultured with hUCB-MSCs. The tumor necrosis factor (TNF)-α-mediated activation of cyclooxygenase-2 and TNF-stimulated gene/protein 6 in hUCB-MSCs polarized naive macrophages toward an M2 phenotype. In addition, hUCB-MSCs down-regulated the activation of nucleotide-binding domain and leucine-rich repeat pyrin 3 inflammasome via a paracrine loop of interleukin-1β signaling. These immune-balancing effects of hUCB-MSCs were reproducible in co-culture experiments using peripheral blood mononuclear cells from patients with active RA. hUCB-MSCs can simultaneously regulate multiple cytokine pathways in response to pro-inflammatory cytokines elevated in RA microenvironment, suggesting that treatment with hUCB-MSCs could be an attractive candidate for patients with treatment-refractory RA.

MicroRNA-302 induces proliferation and inhibits oxidant-induced cell death in human adipose tissue-derived mesenchymal stem cells

Mesenchymal stem cells (MSCs) are a heterogeneous population of cells that proliferate in vitro as plastic-adherent cells, have a fibroblast-like morphology, form colonies in vitro and can differentiate into bone, cartilage and fat cells. The abundance, ease and repeatable access to subcutaneous adipose tissue and the simple isolation procedures provide clear advantages for the use of human adipose tissue-derived mesenchymal stem cells (hASDCs) in clinical applications. We screened microRNAs (miRNAs) that affected the proliferation and survival of hADSCs. Transfection of miR-302d mimic increased cell proliferation and protected cells from oxidant-induced cell death in hADSCs, which was supported by flow-cytometric analysis. miR-302d did not affect the expression of Bcl-2 family members or anti-oxidant molecules. The Nrf2-Keap1 system, which is one of the major mechanisms for the cellular defense against oxidative stress, was not altered by transfection of miR-302d mimic. To identify the target of the miR-302d actions on proliferation and survival of hADSCs, a microarray analysis was performed using miR-302d-overexpressing hADSCs. Real-time PCR analysis showed that transfection of miR-302d mimic inhibited the CDKN1A and CCL5 expression. Downregulation of CDKN1A with a specific siRNA mimicked the effect of miR-302d on hADSCs proliferation, but did not affect miR-302d-induced cell survival. Downregulation of CCL5 protected oxidant-induced cell death as miR-302d, inhibited oxidant-induced reactive oxygen species (ROS) generation and the addition of recombinant CCL5 inhibited the protective action of miR-302d on oxidant-induced cell death. This study indicates that miR-302 controls proliferation and cell survival of hADSCs through different targets and that this miRNA can be used to enhance the therapeutic efficacy of hADSCs transplantation in vivo.

Design Space Exploration for Efficient Resource Utilization in Coarse-Grained Reconfigurable Architecture

Coarse-grained reconfigurable architectures (CGRAs) aim to achieve both goals of high performance and flexibility. In addition, power consumption is significant for the reconfigurable architecture to be used as a competitive processing core in embedded systems. However, the existing reconfigurable architectures require too much area and power. In this paper, we propose a new design space exploration flow, optimizing CGRA to reduce area and power with enhancing performance for digital signal processing (DSP) application domain. It reduces the array size through efficient arrangement of array components and customization of their interconnection, exploiting input patterns belonging to the DSP application domain. Such a design flow is based on pipelining and sharing of area/delay-critical resources in the processing element array. Experimental results show that for DSP applications, the proposed approach reduces area by up to 36.75%, average execution time by 36.78%, and average power by 31.85% when compared with the existing CGRA architecture.

Low Power Reconfiguration Technique for Coarse-Grained Reconfigurable Architecture

Coarse-grained reconfigurable architectures (CGRAs) require many processing elements (PEs) and a configuration memory unit (configuration cache) for reconfiguration of its PE array. Although this structure is meant for high performance and flexibility, it consumes significant power. Specially, power consumption by configuration cache is explicit overhead compared to other types of intellectual property (IP) cores. Reducing power is very crucial for CGRA to be more competitive and reliable processing core in embedded systems. In this paper, we propose a reusable context pipelining (RCP) architecture to reduce power-overhead caused by reconfiguration. It shows that the power reduction can be achieved by using the characteristics of loop pipelining, which is a multiple instruction stream, multiple data stream (MIMD)-style execution model. RCP efficiently reduces power consumption in configuration cache without performance degradation. Experimental results show that the proposed approach saves much power even with reduced configuration cache size. Power reduction ratio in the configuration cache and the entire architecture are up to 86.33% and 37.19%, respectively, compared to the base architecture.

Wip1 suppresses apoptotic cell death through direct dephosphorylation of BAX in response to γ -radiation

Wild-type p53-induced phosphatase 1 (Wip1) is a p53-inducible serine/threonine phosphatase that switches off DNA damage checkpoint responses by the dephosphorylation of certain proteins (i.e. p38 mitogen-activated protein kinase, p53, checkpoint kinase 1, checkpoint kinase 2, and uracil DNA glycosylase) involved in DNA repair and the cell cycle checkpoint. Emerging data indicate that Wip1 is amplified or overexpressed in various human tumors, and its detection implies a poor prognosis. In this study, we show that Wip1 interacts with and dephosphorylates BAX to suppress BAX-mediated apoptosis in response to γ-irradiation in prostate cancer cells. Radiation-resistant LNCaP cells showed dramatic increases in Wip1 levels and impaired BAX movement to the mitochondria after γ-irradiation, and these effects were reverted by a Wip1 inhibitor. These results show that Wip1 directly interacts with and dephosphorylates BAX. Dephosphorylation occurs at threonines 172, 174 and 186, and BAX proteins with mutations at these sites fail to translocate efficiently to the mitochondria following cellular γ-irradiation. Overexpression of Wip1 and BAX, but not phosphatase-dead Wip1, in BAX-deficient cells strongly reduces apoptosis. Our results suggest that BAX dephosphorylation of Wip1 phosphatase is an important regulator of resistance to anticancer therapy. This study is the first to report the downregulation of BAX activity by a protein phosphatase.

Dynamic context management for low power coarse-grained reconfigurable architecture

Coarse-grained reconfigurable architectures (CGRA) require many processing elements (PEs) and a configuration memory unit (configuration cache) for reconfiguration of its PE array. Al-though this structure is meant for high performance and flexibility, it consumes significant power. Specially, power consumption by configuration cache is explicit overhead compared to other types of IP cores. Reducing power in configuration cache is very crucial for CGRA to be more competitive and reliable processing core in embedded systems. In this paper, we propose a dynamic context management strategy for power saving in configuration cache. This power-efficient approach works without degrading the per-formance and flexibility of CGRA. Experimental results show that the proposed approach saves 38.24%/38.15% of the power in write/read-operation of configuration cache with negligible area overhead compared to the previous design.