Yoshiaki Sugizaki

An RF MEMS Variable Capacitor with Intelligent Bipolar Actuation

We propose an IBA scheme based on a pull-out detection, which is suitable for implementing in a circuit. The scheme is implemented in a driver IC that is part of a module with an RF MEMS variable capacitor. No failures are observed over 108 cycles at 85degC, which is an accelerated charging condition.

A high power-handling RF MEMS tunable capacitor using quadruple series capacitor structure

This paper presents an RF MEMS tunable capacitor that achieves an excellent power-handling property with relatively low actuation voltage. The tunable capacitor consists of two fixed MIM (Metal-Insulator-Metal) capacitors and two MEMS capacitor elements, all connected in series. This quadruple series capacitor (QSC) structure enables reduction of the actuation voltage without sacrificing the power-handling capability, since the MIM capacitor reduces the RF voltage amplitude applied to the MEMS capacitors. The measured result demonstrates +36dBm hot-switching at 85°C with 21V pull-in voltage.

Robust hermetic wafer level thin-film encapsulation technology for stacked MEMS / IC package

This paper reports a thin-film encapsulation technology for wafer level micro-electro-mechanical systems (MEMS) package, using poly-benzo-oxazole (PBO) sacrificial material and plasma enhanced chemical vapor deposited silicon oxide (PECVD SiO) cap layer. This technique, which is applicable for MEMS technologies, saves die size and enables conventional package processes such as dicing, picking, mounting and bonding. Besides the fabrication processes of the thin-film encapsulation, this paper also presents the results of finite element models (FEMs) for the deflection and the mechanical stress of the thin-film caps. Moreover, in order to mount a MEMS chip with the thin- film capsulations and another integrated circuit (IC) chip that controls a MEMS chip in the same package, we have also developed an epoxy reinforcement technique for protecting the thin-film encapsulations and a topography wafer thinning technique for the MEMS chip. And then the system in package (SiP) for the MEMS and IC chips is fabricated successfully based on the mechanical analysis of the SiP process.

A fully integrated novel Wafer-Level LED package (WL2P) technology for extremely low-cost solid state lighting devices

Reduction of cost has become the most important challenge for solid state lighting. We proposed a novel Wafer-Level LED Packaging (WL2P) technology, which enables both extremely low cost and small size for future solid state lighting. Where a conventional package needs individual assembly steps, resulting in high fabrication cost, we carried out from growth of the GaN layer, over formation of Inter Layer Dielectric (ILD), wiring for solder pad to printing the phosphor layer on a whole wafer in our WL2P. Thus, for the first time a fully integrated wafer-level process was successfully applied to light emitting diode (LED) devices. It was clearly demonstrated that our WL2P has an excellent thermal resistance as low as 24.2K/W in the 0.6×0.3mm size prototype structure because of the direct connection of Cu wiring to the light emitting layer and a maximum injection power density was as high as 1157W/cm2 in a difference of 50°C between junction temperature and ambient temperature on the aluminum based printed wiring board (PCB)

In-line wafer level hermetic packages for MEMS variable capacitor

In this paper, we report in-line wafer level hermetic packages (WLP) for MEMS variable capacitors. The beam structure of MEMS vibrates strongly under decompression. Since this vibration causes RF noise, it is necessary to set the pressure around the beam structure at 40000Pa or greater. Therefore, a structure that carries out a resin seal of the hole for etching the cap of a formed in the sacrificial layer process, at atmospheric pressure (101300Pa) is crucial for what. To prevent moisture permeation inside a cap, the resin was coated with a PECVD SiN layer. The developed packages become a hybrid hermetic encapsulation, which consists of PECVD SiN layers. Moreover, the deformation of the cap by external pressure was reduced using a corrugated cap. The developed package is comparatively large (340 times 1100 mum). Nevertheless, after the 265degC reflow test (5 times) and -55degC/125degC thermal cycle test (20 cycles), no cracks were observed in the packages. Since all of such processes and materials are compatible with the CMOS process, this package has very low cost. We present a summary of several aspects of our development activities in this MEMS variable capacitor packaging technology.

Highly reliable and manufacturable in-line wafer-level hermetic packages for RF MEMS variable capacitor

In this paper, we report a thin-film encapsulation technology for wafer-level micro-electro-mechanical systems (MEMS) variable capacitor package. The electrical characteristics of MEMS are adversely affected by moisture. In order to prevent moisture from permeating into a package, the top surface was protected with a plasma-enhanced chemical vapor deposition (PE-CVD) SiN layer. The developed packages become a hybrid thin-film hermetic encapsulation consisting of an internal shell using PE-CVD SiO, a seal layer coating with resin, and an external protective layer formed by PE-CVD SiN. The process is fully compatible with standard low-cost back-end-of-the-line (BEOL) technologies for LSIs as a wafer-level package (WLP). This hybrid structure was very effective for protecting the MEMS device from external moisture. Moreover, the electrode surface area has to be wide, because a wide range of capacities is necessary in MEMS variable capacitors. We have developed a large (1480 × 1080 µm) hermetic thin-film encapsulation as WLP.

Novel wafer-level CSP for stacked MEMS / IC dies with hermetic sealing

Novel wafer-level chip scale package (WL-CSP) applicable to configurations involving stacking of multiple dies has been developed. Since stacked die makes high topography and it is difficult to apply conventional WL-CSP process, gold bonding wires were used for not only connecting stacked dies with one another but also for connecting from each die to CSP terminals. The WL-CSP is also applicable to microelecrromechanical system (MEMS) that requires hermetic sealing. Thin-film encapsulation for MEMS was formed by conventional back end of line (BEOL) process. Followed by die stacking and gold wire forming, chemical vapor deposition (CVD) was applied to make hermetic sealing. The WL-CSP does not require photolithography process on topography wafer. It promises a cost-effective solution for MEMS/IC dies coupled device.

A CMOS embedded RF-MEMS tunable capacitor for multi-band/multi-mode smartphones

This paper reports on 1-chip RF-MEMS tunable capacitor that equips CMOS driver circuit in the underlying layer. A Wafer Level Chip Scale Package (WLCSP) optimized for RF-MEMS is employed to minimize the module size. The MEMS actuation voltage is generated by an Actuation Voltage Generator (AVG). The boost mechanism employed in the AVG enables instant high voltage generation and reduction of the dielectric charging. The measured noise at RF frequencies is less than -120dbm, thanks to a shield metal layer formed between MEMS and CMOS layers. To achieve high power handing and high creep immunity, we employ the previously reported techniques, the Quadruple Series Capacitor (QSC) [1] and the SiN springs [2]. The quality factor measured in the WLCSP is larger than 100 at 1GHz. The capacitance can be changed from 1.4pF to 5pF by a step of 0.45pF.

Ultracompact 4×3.4 Gbps optoelectronic package for an active optical HDMI cable

Refering to the increasing demand for extended transmission distances of high-definition video in consumer electronics we present a composite optoelectronic high-definition multimedia interface (HDMI) cable that replaces the four electrical transition-minimized differential signal video channels by a 4×3.4 Gb/s optical fiber link, the currently maximum specified bit rate. This improves the signal quality after 10 m transmission compared to a passive electrical cable significantly and enables even longer cable lengths or higher transmission rates. At the same time we developed a compact package of both the optical sub-assembly and its adjoining control ICs that fits inside the cable connector. We outline the package assembly and present basic transmission characteristics, as well as confirm 1080p video transmission over 10 m.

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We introduce an extremely thin 50/125 perfluorinated graded-index plastic optical fiber (POF) and its application in a 4×10 Gb/s optical link including our optical sub-assembly (OSA). We outline the main characteristics of the POF before the introduction of the fibers to our already established OSA is explained. Particularly low attenuation with error-free transmission down to a bending radius of 1 mm is presented in comparison to a quartz optical fiber. Furthermore eye diagrams of all four channels after 5 m over POF at 10 Gb/s are presented. Bit error rate for all channels is less than 10-12 and remains constant when another channel is being driven simultaneously.