Yoshihiro Mochizuki

Shear Stress Analyses in Chemical Mechanical Planarization with Cu/Porous Low-k Structure

In current LSI devices, porous low-k films are adopted as interlayer dielectrics (ILDs). However, the extremely low Youngs moduli of these films result in defects such as delamination, which are sometimes induced during chemical mechanical planarization (CMP). The main cause of delamination is thought to be shear stress induced by CMP downward pressure. In this study, we demonstrated that finite element method (FEM) results could be used to predict dangerous stress fields during CMP. It was revealed that shear stress concentrated on the ILD boundary with a large modulus difference. Moreover, stresses at dense lines were always lower than those at isolated lines. Furthermore, shear stress was sensitive to frictional force. The effect of a plasma-damaged layer on shear stress was quite limited. Consequently, these considerations provide a useful suggestion for future work on Cu/porous low-k-film fabrication as well as on the CMP of LSI devices.

Stress Analyses during Chemical Mechanical Planarization Processing with Cu/Porous Low-k Structures of LSI Devices

Porous low-k materials are required for the construction of 45-nm-node LSI devices. However, the extremely low Youngs modulus values of these materials result in the stress corrosion cracking (SCC) of the Cu interconnects during chemical mechanical planarization (CMP). We performed finite element method analyses of the stress at each step during the CMP. The results showed that the horizontal tensile stress was especially concentrated at the edges of the isolated fine wiring, and that higher tensile stresses appeared at the step of the barrier CMP. Moreover, the maximum values of the tensile stress increased with a decrease in Youngs modulus in the low-k films. The cause of the horizontal tensile stress was the downward CMP pressure, which indented the low-k films. These results suggest that CMP with a lower downward pressure and an LSI structure with a Cu dummy pattern were effective for avoiding SCC.

Stress Analysis of Dielectrics Using FEM for Analyzing the Cause of Cracking Observed After W-CMP

This study examined the cause of the mechanical fracture (cracking) of dielectrics observed after chemical mechanical polishing (CMP) in the damascene interconnect process for W/oxide structures through the stress analysis of dielectrics with the finite element method (FEM). The analysis, performed considering polishing pressure during CMP and residual film stress, revealed that the stress in dielectrics generated by polishing pressure during CMP was approximately 2% of that generated through W film removal. This result suggests a high likelihood that the cracking of dielectrics observed after CMP is caused by the release of residual stress in W film through CMP. To prevent the mechanical fracture of dielectrics, it is thus important to reduce defects in the deposition of dielectrics and to decrease residual film stress.

Study on evaluation method for polishing pad surface topography based on optical fourier transform

An optical technique based on the optical Fourier transform has been developed to evaluate the characteristics of polishing pad surface topography. The power spectrum from the optical Fourier transform, which correlates with the diffracted light intensity distribution from the diffused reflection laser light of the polishing pad surface, is observed by an area sensor camera. Then, the correlation between the spatial frequency characteristic of the polishing pad topographies and the material removal rate are investigated.

Shear Stress Analyses in Chemical Mechanical Planarization Processing with Cu/porous low-k Structure

Masako Kodera , Yoshihiro Mochizuki , Akira Fukuda , Hirokuni Hiyama 2 and Manabu Tsujimura 1 Process and Manufacturing Engineering Center, Toshiba Semiconductor Company, 8 Shinsugita-cho, Isogo-ku, Yokohama, 235-8522 Japan 2 Ebara Research Corp., 4-2-1 Honfujisawa, Fujisawa, 251-8502 Japan , 3 Ebara Corp., 4-2-1 Honfujisawa, Fujisawa, 251-8502 Japan * Phone; +81-45-770-3518, Fax; +81-45-770-3568, e-mail; masako.kodera@toshiba.co.jp