Masako Kodera

Localized Oxidation of the Cu Surface after Chemical Mechanical Planarization Processing

After chemical mechanical planarization (CMP) processing of a Cu/low-k structure device, defects are often observed and some of them induce problems in manufacturing very large scale integrated circuit (VLSI) devices. As an example of defects, watermarks and protrusions on the Cu are detected. We found that the number of watermarks or protrusions is strongly affected by the cleaning conditions. The energy dispersive X-ray analysis (EDX) showed that these protrusions were composed of Cu and O. Moreover, atomic force microscopy (AFM) observations revealed that these protrusions grew during the storage time after the postcleaning. Electrochemical measurements also indicated that the protrusions were oxidized copper formed in the cleaning solutions due to the difference in corrosion current densities for various conditions of the Cu surface. Therefore, optimization of the post-CMP cleaning processing is a key issue for the reduction of defects such as protrusions.

Evaluation of Dielectric Constant through Direct Chemical Mechanical Planarization of Porous Low-k Film

Nanoporous materials are utilized in back end of line (BEOL) processing of current devices. However, their low k-values often alter during device fabrication such as plasma processing and/or wet treatment. In this study, we analyzed the effect of chemical mechanical planarization (CMP) slurries on k-values, and also evaluated three types of nanoporous low-k materials that were exposed to CMP slurries, dry processing, and/or barrier sputtering. We confirm that the k-value increase during direct CMP of porous low-k films is caused by the diffusion of surfactant through the films, depending on the characteristics of the nanoporous film and surfactant. The diffusion is explained by the adsorption of surfactant on sidewalls of continuous pores formed by porogen desorption while it is easily released by post-CMP annealing. In contrast, the increase in k-value during CMP after dry processing is mainly caused by moisture uptake.

Visualization and automatic detection of defect distribution in GaN atomic structure from sampling Moiré phase

Quantitative detection of defects in atomic structures is of great significance to evaluating product quality and exploring quality improvement process. In this study, a Fourier transform filtered sampling Moiré technique was proposed to visualize and detect defects in atomic arrays in a large field of view. Defect distributions, defect numbers and defect densities could be visually and quantitatively determined from a single atomic structure image at low cost. The effectiveness of the proposed technique was verified from numerical simulations. As an application, the dislocation distributions in a GaN/AlGaN atomic structure in two directions were magnified and displayed in Moiré phase maps, and defect locations and densities were detected automatically. The proposed technique is able to provide valuable references to material scientists and engineers by checking the effect of various treatments for defect reduction.Quantitative detection of defects in atomic structures is of great significance to evaluating product quality and exploring quality improvement process. In this study, a Fourier transform filtered sampling Moire technique was proposed to visualize and detect defects in atomic arrays in a large field of view. Defect distributions, defect numbers and defect densities could be visually and quantitatively determined from a single atomic structure image at low cost. The effectiveness of the proposed technique was verified from numerical simulations. As an application, the dislocation distributions in a GaN/AlGaN atomic structure in two directions were magnified and displayed in Moire phase maps, and defect locations and densities were detected automatically. The proposed technique is able to provide valuable references to material scientists and engineers by checking the effect of various treatments for defect reduction.

Shear Stress Analyses in Chemical Mechanical Planarization with Cu/Porous Low-k Structure

In current LSI devices, porous low-k films are adopted as interlayer dielectrics (ILDs). However, the extremely low Youngs moduli of these films result in defects such as delamination, which are sometimes induced during chemical mechanical planarization (CMP). The main cause of delamination is thought to be shear stress induced by CMP downward pressure. In this study, we demonstrated that finite element method (FEM) results could be used to predict dangerous stress fields during CMP. It was revealed that shear stress concentrated on the ILD boundary with a large modulus difference. Moreover, stresses at dense lines were always lower than those at isolated lines. Furthermore, shear stress was sensitive to frictional force. The effect of a plasma-damaged layer on shear stress was quite limited. Consequently, these considerations provide a useful suggestion for future work on Cu/porous low-k-film fabrication as well as on the CMP of LSI devices.

Stress Analyses during Chemical Mechanical Planarization Processing with Cu/Porous Low-k Structures of LSI Devices

Porous low-k materials are required for the construction of 45-nm-node LSI devices. However, the extremely low Youngs modulus values of these materials result in the stress corrosion cracking (SCC) of the Cu interconnects during chemical mechanical planarization (CMP). We performed finite element method analyses of the stress at each step during the CMP. The results showed that the horizontal tensile stress was especially concentrated at the edges of the isolated fine wiring, and that higher tensile stresses appeared at the step of the barrier CMP. Moreover, the maximum values of the tensile stress increased with a decrease in Youngs modulus in the low-k films. The cause of the horizontal tensile stress was the downward CMP pressure, which indented the low-k films. These results suggest that CMP with a lower downward pressure and an LSI structure with a Cu dummy pattern were effective for avoiding SCC.

Mechanism of a New Post CMP Cleaning for Trench Isolation Process

CMP has been revealed as an attractive technique to poly Si of trench planalizing process. Major issues of process integration for that purpose have been post-CMP cleaning process. A new post CMP cleaning process which employed special organic surfactant has been reported in this paper. In general, wafers after CMP process are contaminated by particles and metallic impurities in the case of conventional cleaning method. The contamination introduce the defects into the wafers after oxidation. The contamination was removed by new cleaning method. using DI water containing special organic surfactant and silica particles. The experimental work has focused on critical problems that had to be solved, using AFM, EDX and VPDICP/MS.

Potential Characterization of Interconnect Corrosion by Kelvin Probe and Electrostatic Force Microscopies

The fine-scale potential observation was performed by Kelvin probe force microscopy (KFM) and electrostatic force microscopy (EFM) using tungsten interconnects in which the minimum width was 43 nm. It was confirmed that the line connected to pads and/or a transistor has a peculiar KFM potential by comparing it with the surrounding pattern. Only the plugs attached to this line were corroded, while the other plugs remained intact. By comparing the results of KFM and EFM observations, the peculiar potential of the line can be attributed to the electron charge up in the bulk of the sample. Charged electrons induced corrosion not only in the line itself but also in the connected structure. It was also revealed that the particular potential can be suppressed by a wet treatment.

Nanometer‐Scale Stress Field Evaluation of Cu/ILD Structure by Cathodoluminescence Spectroscopy

Engineering of the residual stress fields related to the backend process of LSI devices with Cu interconnects is required together with the adoption of low‐k materials that have quite low Youngs modulus. We measured the nano‐scale residual stresses stored within interlayer dielectric (ILD) films according to a cathodoluminescence (CL) piezo‐spectroscopic technique. The SiO2 film (k = 4.1) produced a sharp and stable spectrum, which well suited for the analysis of stress distribution on the surface. We confirmed that stresses in ILD could be successfully detected with less than 50 nm spatial resolution and that a higher chemical mechanical polishing (CMP) downward pressure led to a shift toward the tensile side of the residual stress field stored in the ILD film. We also carried out line‐scan analyses of a cross section as well as a surface of the sample. Furthermore, we performed thermal stress analyses by FEM and made a comparison with the CL results. The tensile stress peak neighboring a Cu line observ...

Development of Dishing-less Slurry for Polysilicon Chemical-Mechanical Polishing Process

Dishing of polysilicon and thinning of the stopper silicon nitride films are crucial problems when the polysilicon embedded by low pressure chemical vapor deposition in the trench and the concavity with respective widths of 0.7 µm and 20–100 µm is simultaneously flattened by chemical-mechanical polishing (CMP). In order to suppress these two occurrences, a high polymer compound mixed slurry was developed and characterized. The pH value of the slurry measured on the polishing abrasive pad was decreased by dilution with de-ionized water, which resulted in cohesion and solidification of the slurry. By using this cohered and solidified slurry when the poly silicon surface is flattened by CMP, the dishing thickness of the polysilicon was suppressed to less than 100 nm at a concavity width of 100 µm. The CMP process using the developed slurry is useful for the advanced trench isolation process and is currently applied to NAND flash memory and high-speed bipolar LSI devices.

Corrosion control technique in copper metallization using gas dissolved water

Copper wiring corrosion occurs after CMP as well as during CMP. It can be reduced by post-CMP cleaning using gas dissolved water. A leakage current between Cu wiring often increases during storage after CMP, which is induced by corrosion. Gas dissolved water is able to not only remove residual impurities but also control the surface potential of Cu and barrier metal. Therefore treatment in gas dissolved water can prevent increasing leakage current.