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Dive into the research topics where Yoshikazu Ohno is active.

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Featured researches published by Yoshikazu Ohno.


Japanese Journal of Applied Physics | 1998

Impact of Organic Contaminants from the Environment on Electrical Characteristics of Thin Gate Oxides

Tamotsu Ogata; Cozy Ban; Seiji Muranaka; Tomohiko Hayashi; Kiyoteru Kobayashi; Junji Kobayashi; Hiroshi Kurokawa; Yoshikazu Ohno; Makoto Hirayama

We have investigated the impact of organic contaminants from the environment on the electrical characteristics of gate oxides by evaluation of electrical characteristics of metal oxide semiconductor (MOS) capacitors and gas chromatography-mass spectrometry following thermodesorption (TD-GC/MS) analysis of organic species adsorbed on silicon surfaces. It was found that organic contaminants from the environment adsorbed on silicon surfaces deteriorate gate oxide reliability; the increase in both breakdown and infant failure of gate oxides is enhanced by organic contaminants from the environment and depends on gate oxide thickness and the kind of silicon substrate. These results are useful for clarifying the deterioration mechanism of gate oxides caused by organic contaminants on silicon surfaces.


Nuclear Instruments & Methods in Physics Research Section B-beam Interactions With Materials and Atoms | 1995

Direct measurement and improvement of local soft error susceptibility in dynamic random access memories

M. Takai; T. Kishimoto; H. Sayama; Yoshikazu Ohno; K. Sonoda; T. Nishimura; Atsushi Kinomura; Y. Horino; K. Fujii

Abstract Soft errors induced in a dynamic random access memory (DRAM) have been measured using a nuclear microprobe. Soft error susceptibility of the local position and structure to the soft error has been clarified. Collection efficiency of charge carriers, induced by incident ions on reverse biased p-n junctions with barrier well structures, has been verified for various implantation doses for well formation.


Japanese Journal of Applied Physics | 1995

Well Structure by High-Energy Boron Implantation for Soft-Error Reduction in Dynamic Randam Access Memories (DRAMs)

T. Kishimoto; Y.K. Park; M. Takai; Yoshikazu Ohno; K. Sonoda; H. Sayama; Tadashi Nishimura; Atsushi Kinomura; Y. Horino; K. Fujii

The susceptibility against soft-errors in dynamic random access memories (DRAMs) has been evaluated using nuclear microprobes by monitoring various addresses of a memory cell array to determine the influence of upper wiring layers such as word lines, bit lines and other patterns. The correlations between irradiated positions of microprobes and monitored cell positions were discussed. The effect of buried implanted layers against carrier collection has also been investigated using ion-beam-induced-current (IBIC) measurement. IBIC measurement revealed that the retrograde well structure was more effective in suppressing soft errors than conventional well structures in bulk or epitaxial substrates.


IEEE Transactions on Nuclear Science | 1996

Soft error susceptibility and immune structures in dynamic random access memories (DRAMs) investigated by nuclear microprobes

M. Takai; T. Kishimoto; Yoshikazu Ohno; H. Sayama; K. Sonoda; S. Satoh; Tadashi Nishimura; H. Miyoshi; Atsushi Kinomura; Y. Horino; K. Fujii

Soft error susceptibility mapping and ion-beam-induced-current (IBIC) measurements using a nuclear microprobe allow a quantitative evaluation of the charge collection which induces upset in dynamic random access memories (DRAMs). Soft error susceptibility in DRAMs as a function of local position and structure has been reviewed. Charge collection efficiency induced by incident ions on reverse-biased n/sup +/p junctions with various barrier well structures has been compared with that with a conventional well in a p/sup -/ epitaxial layer on a p/sup +/ substrate.


Japanese Journal of Applied Physics | 1993

Charge Collection Control Using Retrograde Well Tested by Proton Microprobe Irradiation

Hirokazu Sayama; Hiroshi Kimura; Yoshikazu Ohno; Shinichi Satoh; K. Sonoda; Norihiko Kotani; M. Takai

Soft error reduction by high-energy ion-implanted layers has been investigated by novel evaluation techniques using high-energy proton microprobes. A retrograde well formed by 160 and 700 keV boron ion implantation could completely suppress soft errors induced by the proton microprobes at 400 keV. The proton-induced current revealed the charge collection efficiency for the retrograde well structure. The collected charge for the retrograde well in the soft-error mapping was proved to be lower than the critical charge of the measured DRAMs (dynamic random-access memories). Complementary use of soft-etror mapping and ion-induced-current measurement could clarify well structures immune against soft errors.


IEEE Transactions on Electron Devices | 2001

Excess currents induced by hot hole injection and FN electron injection in thin SiO/sub 2/ films

Akinobu Teramoto; Kiyoteru Kobayashi; Yoshikazu Ohno; Akira Shigetomi

The behavior of excess currents induced by Fowler-Nordheim electron injection stress (FN electron injection) has been investigated for 6.0-nm oxides. Excess currents are induced by FN electron injection in 6.0-nm oxides together with positive charges being induced in it. To clarify the role of hole injection in FN electron injection, the behavior of excess currents induced by substrate hot hole injection has also been investigated in 6.0-nm oxides. The leakage behavior after hot hole injection is the same as FN electron injection. The excess currents induced both by the FN electron injection and by the substrate hot hole injection are due to trap-assisted tunneling and field enhancement at the cathode due to the positive trapped charge. The charge centroid of the positive charges induced by both stresses are located 3.0 nm from the Si/SiO/sub 2/ interface which is at the center of 6.0-nm oxide. The excess currents induced by hot hole injection and FN electron injection are caused by traps in SiO/sub 2/ films produced by injected holes from the anode.


Japanese Journal of Applied Physics | 1994

DISK-SHAPED STACKED CAPACITOR CELL FOR 256 MB DYNAMIC RANDOM-ACCESS MEMORY

Toshinori Morihara; Yoshikazu Ohno; Takahisa Eimori; Toshiharu Katayama; Shinichi Satoh; Tadashi Nishimura; Hirokazu Miyoshi

A new cell structure using the disk-shaped stacked capacitor is proposed for 256 Mb dynamic random-access memory (DRAM). This capacitor structure is formed on the sidewall of a cylindrical storage node by means of a self-alignment method. The lithographic process of the disk-shaped storage node is the same as that of the cylindrical one. The distance between adjacent storage node patterns of 0.1 µ m can be realized beyond the limits set by lithographic resolution. It is estimated that the capacitance of 25 fF/cell can be obtained in the 0.4 µ m storage node height in a 0.72 µ m2 cell area. The disk-shaped stacked capacitor, to which ON dielectric film (t eq=4 or 5 nm) is applied, is investigated with regard to electrical characteristics.


Japanese Journal of Applied Physics | 1982

Diamond-Anvil Cell Equipped with a Worm Gear Intensifier for Pressure Generation at Low Temperature

Shoichi Endo; Osamu Mishima; Yoshikazu Ohno; Tetsuya Kawamura

A diamond-anvil cell for which pressure can be controlled at low temperature has been developed. A torque applied to the outside of the cryostat is intensified by a double worm gear so as to force diamond anvils together for pressure generation. Pressure up to 180 kbar has been confirmed at 1.8 K on the basis of ruby fluorescent measurements. The device, with a horizontal beam axis, is favorable for optical, X-ray and other similar experiments using an ordinary cryostat.


Japanese Journal of Applied Physics | 1992

New Method for Soft-Error Mapping in Dynamic Random Access Memory Using Nuclear Microprobe

Hirokazu Sayama; Shigenori Hara; Hiroshi Kimura; Yoshikazu Ohno; Shinichi Satoh; M. Takai

Locally sensitive positions against soft error in a dynamic random access memory (DRAM) have, for the first time, been investigated using a proton microprobe. Both soft-error (bit-state) mapping and secondary electron mapping images of the investigated area could locally identify sensitive positions against soft error. Two kinds of error modes in a DRAM (i.e., cell mode and bit-line mode) could be directly monitored.


Integrated Ferroelectrics | 1995

Integration of BST thin film for DRAM fabrication

H. Itoh; Keiichirou Kashihara; Tomonori Okudaira; Yoshikazu Tsunemine; Yoshikazu Ohno; Tadashi Nishimura; Tsuyoshi Horikawa; Teruo Shibano

Abstract A process technique to integrate the sputter-deposited BST thin film into the DRAM is discussed. With some reconsiderations concerning the grain structure of the BST, the care of the electrode edge, the thermal stability of the capacitor characteristic, the upper dielectric of the capacitor and so on, the BST was successfully integrated into a capacitor TEG structure on a 9Mbits scale. By using the newly developed integration technique, a 4MDRAM was fabricated, exhibiting the normal bit function with a wide margin. After this, improvements on the thermal stability are needed by developing a barrier layer under the bottom Pt electrode that is more heat-resistant than currently achieved.

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Atsushi Kinomura

National Institute of Advanced Industrial Science and Technology

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K. Fujii

National Institute of Advanced Industrial Science and Technology

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Y. Horino

National Institute of Advanced Industrial Science and Technology

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