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Dive into the research topics where Youichi Ishimura is active.

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Featured researches published by Youichi Ishimura.


ieee industry applications society annual meeting | 2002

Low turn-off switching energy 1200 V IGBT module

Junji Yamada; Yoshiharu Yu; Youichi Ishimura; John F. Donlon; E.R. Motto

A new 5th generation IGBT module with low turn-off energy has been developed. The module utilizes IGBT chips optimized for high frequency industrial power supplies in applications such as X-ray, MRI (magnetic resonance imaging), and induction heating. This technology is designed to provide a simplified cost effective alternative to parallel discrete MOSFETs in these applications.


international symposium on power semiconductor devices and ic's | 1995

A high performance IGBT with new n+buffer structure

H. Takahashi; Youichi Ishimura; C. Yokoyama; Hiroyasu Hagino; T. Yamada

An advanced IGBT with a new n+buffer structure has been developed. The new n+buffer structure is that some n+buried layers are formed at the boundary between a p+substrate and a n+buffer layer. The concentration of the n+buried layers is almost the same as that of the p+substrate. The fabrication of the IGBT with the new n+buffer structure used a 3rd gen 600 V/100 A chip. Taking the VVVF inverter as an application, total power loss generated was about 12% less compared to the conventional IGBT, only changing the n+buffer structure. And the short circuit safe operating area of the new IGBT was almost similar to the conventional IGBT. Moreover, we discussed differences between the new IGBT and the conventional IGBT using a 3D simulator, DAVINCI.


applied power electronics conference | 2002

A 1700 V LPT-CSTBT with low loss and high durability

Eric R. Motto; John F. Donlon; T. Nakagawa; Youichi Ishimura; Katsumi Satoh; Junji Yamada; Masanori Yamamoto; Shigeru Kusunoki; Hideki Nakamura; Katsumi Nakamura

This paper describes a new 1700 V power device based on a wide cell pitch carrier stored trench bipolar transistor (CSTBT). The new chip also utilizes a light punch through (LPT) vertical structure that is produced using low cost single crystal (nonepitaxial) wafer material. The device is optimized to provide the best trade-off between losses and ruggedness for industrial power conversion applications. A new gate process that enhances the reliability of the gate isolation film is another key technology utilized in the development of this device. The new 1700 V device demonstrates the successful extension of technologies previously used for 1200 V CSTBT devices to higher blocking voltages.


international symposium on power semiconductor devices and ic's | 2002

Advanced wide cell pitch CSTBTs having light punch-through (LPT) structures

Katsumi Nakamura; Shigeru Kusunoki; Hideki Nakamura; Youichi Ishimura; Yoshifumi Tomomatsu; Tadaharu Minato


Archive | 1999

Semiconductor wafer and semiconductor device

Youichi Ishimura; Hideki Takahashi; Norihisa Asano


Archive | 1995

Field effect type semiconductor device and manufacturing method thereof

Yoshifumi Tomomatsu; Youichi Ishimura


Archive | 2002

Insulated gate semiconductor device for realizing low gate capacity and a low short-circuit current

Youichi Ishimura; Yoshifumi Tomomatsu


Archive | 2002

Insulated gate semiconductor device and method of manufacturing the same

Youichi Ishimura; Yoshifumi Tomomatsu


Archive | 1995

Field-effect semiconductor device and its manufacturing method

Youichi Ishimura; Yoshifumi Fukuoka-shi Tomomatsu


Archive | 1999

Field effect semiconductor component, such as MOSFET, with MOS structure in semiconductor layer of first conductivity

Youichi Ishimura; Hiroshi Yamaguchi; Kazunari Hatade

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John F. Donlon

Okayama University of Science

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