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Dive into the research topics where Young-Jin Moon is active.

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Featured researches published by Young-Jin Moon.


IEEE Microwave and Wireless Components Letters | 2009

A 4.39–5.26 GHz LC-Tank CMOS Voltage-Controlled Oscillator With Small VCO-Gain Variation

Young-Jin Moon; Yong-Seong Roh; Chan-Young Jeong; Changsik Yoo

A wide band CMOS LC-tank voltage controlled oscillator (VCO) with small VCO gain (KVCO) variation was developed. For small KVCO variation, serial capacitor bank was added to the LC-tank with parallel capacitor array. Implemented in a 0.18 mum CMOS RF technology, the proposed VCO can be tuned from 4.39 GHz to 5.26 GHz with the VCO gain variation less than 9.56%. While consuming 3.5 mA from a 1.8 V supply, the VCO has -113.65 dBc/Hz phase noise at 1 MHz offset from the carrier.


IEEE Transactions on Power Electronics | 2011

Active Power Factor Correction (PFC) Circuit With Resistor-Free Zero-Current Detection

Yong-Seong Roh; Young-Jin Moon; Jung-Chul Gong; Changsik Yoo

An active power-factor correction (PFC) circuit is presented that employs a newly proposed resistor-free zero-current detection (ZCD). While the conventional ZCD requires either a sensing resistor or auxiliary transformer, the proposed ZCD requires only one OFF-chip capacitor. The active PFC circuit with the proposed resistor-free ZCD has been implemented in a 0.35-μm BCDMOS process and the power factor is improved up to 9% from the one employing the conventional ZCD. The proposed resistor-free ZCD scheme can be applied to any type of switch-mode dc-dc power converter.


IEEE Transactions on Power Electronics | 2014

A CCM/DCM Dual-Mode Synchronous Rectification Controller for a High-Efficiency Flyback Converter

Jeongpyo Park; Yong-Seong Roh; Young-Jin Moon; Changsik Yoo

A dual-mode synchronous rectification (SR) controller supporting both the continuous-conduction mode and discontinuous-conduction mode is developed to improve the power efficiency of a flyback converter. The dual-mode SR controller ensures nonoverlapped turning-on of the primary and secondary switches by monitoring the voltage level of the secondary switch. The dual-mode SR controller requiring four pins and only one external resistor has been implemented in a 0.35-μm BCDMOS process and applied to a 50-W flyback converter. The efficiency of the flyback converter is improved by upto 6.8% when the dual-mode SR controller is employed compared to the one employing the conventional SR controller.


IEEE Transactions on Power Electronics | 2014

A Two-Phase Interleaved Power Factor Correction Boost Converter With a Variation-Tolerant Phase Shifting Technique

Yong-Seong Roh; Young-Jin Moon; Jeongpyo Park; Changsik Yoo

This paper presents a two-phase interleaved critical conduction mode (CRM) power factor correction boost converter with a variation-tolerant phase shifter (VTPS), which ensures accurate 180° phase shift between the two interleaved converters. A feedback loop similar to a phase-locked loop controls the amount of the phase shifting of the VTPS. The proposed VTPS has better immunity of process, supply, and temperature variations than the conventional phase shifter. A 320-W two-phase interleaved CRM boost converter prototype has been implemented, while the proposed VTPS and conventional interleaving phase shifter can be selectively applied to compare the performance of the proposed technique with the conventional one. Experimental results show that the two-phase interleaved CRM boost converter has better performance with the proposed VTPS. The proposed VTPS circuit can be applied to any type of interleaved switching power converter.


IEEE Transactions on Circuits and Systems Ii-express Briefs | 2012

Load-Independent Current Control Technique of a Single-Inductor Multiple-Output Switching DC–DC converter

Young-Jin Moon; Yong-Seong Roh; Jung-Chul Gong; Changsik Yoo

A load-independent current control technique is applied to a single-inductor multiple-output switching dc-dc boost converter implemented in a 0.5-μm standard CMOS technology. The total current is regulated by monitoring the instant of zero inductor current, and no additional power stage and reactive components are required. The output voltage settles within 25 μs with a voltage dip less than 50 mV when the load of the other output changes between 0 and 50 mA.


asian solid state circuits conference | 2012

A 3.0-W wireless power receiver circuit with 75-% overall efficiency

Young-Jin Moon; Yong-Seong Roh; Changsik Yoo; Dong-Zo Kim

Resonant magnetic coupling is utilized to transfer 3.0-W power without wire. The received AC power is rectified by an active rectifier and then converted to the desired DC level by a switching DC-DC converter. The reverse leakage of the active rectifier is prevented by a delay locked loop (DLL) based delay compensation circuit. The overall power efficiency of the wireless power receiver implemented in a 0.35-μm BCDMOS technology is 75-% when the resonant frequency of the magnetic resonator is 3.23-MHz.


IEEE Transactions on Power Electronics | 2015

A Multiphase Synchronous Buck Converter With a Fully Integrated Current Balancing Scheme

Yong-Seong Roh; Young-Jin Moon; Jeongpyo Park; Min-Gyu Jeong; Changsik Yoo

A multiphase synchronous buck converter has been developed, in which the number of switching phases is determined by the sensed average load current. The maximum number of switching phases is four. The dc resistance (DCR) of switching inductor is used to detect the average current, which is also utilized to balance the load current among the multiple switching phases. The instantaneous inductor current is sensed as well to generate the pulsewidth modulation (PWM) signal to switch the inductors. The multiphase synchronous buck converter implemented in a 0.13-μm BCDMOS process shows 91.1% maximum power efficiency when the input voltage is 2.8 V, output voltage is 1.0 V, and output current is 2.0 A.


IEEE Transactions on Industrial Electronics | 2016

Quasi-Resonant (QR) Controller With Adaptive Switching Frequency Reduction Scheme for Flyback Converter

Jeongpyo Park; Young-Jin Moon; Min-Gyu Jeong; Jin-Gyu Kang; Sang-Hyun Kim; Jung-Chul Gong; Changsik Yoo

A quasi-resonant (QR) controller with an adaptive frequency reduction scheme has been developed for a flyback converter. While maintaining the valley switching, the QR controller reduces the switching frequency for lighter load by skipping some valleys to reduce the power loss and thereby achieve better light-load efficiency. If the QR controller cannot detect any valley due to the damped oscillation of switch voltage, then the valley switching is given up and the nonvalley switching is employed to keep reducing the switching frequency for lighter load. The proposed QR controller has been implemented in a 0.35-μm 700-V BCDMOS process and applied to a 40-W flyback converter. The power efficiency of the flyback converter is improved by up to 3.0% when the proposed QR controller is employed compared to the one employing the conventional QR controller.


International Journal of Circuit Theory and Applications | 2015

A switch‐mode boost DC–DC converter for IR‐drop compensation of charging cable

Young-Jin Moon; Changsik Yoo

Summary A switch-mode boost DC–DC converter has been developed to compensate for the IR-drop because of the finite resistance of a charging cable. The boost ratio of the DC–DC converter is adaptively controlled by an IR-drop sensing circuit to provide the required voltage level to a battery charger regardless of the cable resistance. Implemented in a 0.18 µm BCDMOS process, the IR-drop compensating switch-mode boost DC–DC converter occupies 6.2 mm2 active area and shows the 93.2% peak efficiency. The proposed IR-drop compensating boost converter can be applied to compensate for the IR-drop of any type of charging cables. Copyright


Journal of Semiconductor Technology and Science | 2012

Low Drop-Out (LDO) Voltage Regulator with Improved Power Supply Rejection

Ho-Joon Jang; Yong-Seong Roh; Young-Jin Moon; Jeongpyo Park; Changsik Yoo

The power supply rejection (PSR) of low drop-out (LDO) voltage regulator is improved by employing an error amplifier (EA) which is configured so the power supply noise be cancelled at the output. The LDO regulator is implemented in a 0.13-µm standard CMOS technology. The external supply voltage level is 1.2-V and the output is 1.0-V while the load current can range from 0-mA to 50-mA. The power supply rejection is 46-dB, 49-dB, and 38- dB at DC, 2-MHz, and 10-MHz, respectively. The quiescent current consumption is 65-�A.

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