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Yugo Kashiwagi

Hitachi

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Publication

Featured researches published by Yugo Kashiwagi.

Proceedings of the Fifth TRON Project Symposium on TRON Project 1988: open-architecture computer systems | 1989

Development of a C compiler for Gmicro microprocessor based on TRON architecture

Yugo Kashiwagi; Hideaki Chaki; Masachika Narushima

Hitachi Ltd. has developed a C compiler for Gmicro microprocessor which is based on TRON architecture. The compiler implements the language specification based on the ANSI standard draft, and constitutes unified programming environment with other cross development tools.

Archive | 1994

Data processor and method utilizing coded no-operation instructions

Shinichi Yoshioka; Fumio Arakawa; Hiroshi Yajima; Yugo Kashiwagi

Archive | 1995

Microcomputer having 16 bit fixed length instruction format

Shumpei Kawasaki; Eiji Sakakibara; Kaoru Fukada; Takanaga Yamazaki; Yasushi Akao; Shiro Baba; Toshimasa Kihara; Keiichi Kurakazu; Takashi Tsukamoto; Shigeki Masumura; Yasuhiro Tawara; Yugo Kashiwagi; Shuya Fujita; Katsuhiko Ishida; Noriko Sawa; Yoichi Asano; Hideaki Chaki; Tadahiko Sugawara; Masahiro Kainaga; Kouki Noguchi; Mitsuru Watabe

Archive | 1995

Microcomputer executing compressed program and generating compressed branch addresses

Hiroshi Yajima; Yugo Kashiwagi

Archive | 1989

Multiplication, division and square root extraction apparatus

Masahisa Narita; Hisashi Kaziwara; Takeshi Asai; Shigeki Morinaga; Hiroyuki Kida; Mitsuru Watabe; Tetsuaki Nakamikawa; Shunpei Kawasaki; Junichi Tatezaki; Norio Nakagawa; Yugo Kashiwagi

Archive | 1992

Data processing system having multiple register management for call and return operations

Tan Watanabe; Keiichi Kurakazu; Yugo Kashiwagi; Keisuke Toyama; Tohru Nojiri

Archive | 1995

RISC system with instructions which include register area and displacement portions for accessing data stored in registers during processing

Tan Watanabe; Keiichi Kurakazu; Yugo Kashiwagi; Keisuke Toyama; Tohru Nojiri

Archive | 1987

RISC system performing calls and returns without saving or restoring window pointers and delaying saving until multi-register areas are filled

Tan Watanabe; Keiichi Kurakazu; Yugo Kashiwagi; Keisuke Toyama; Thoru Nojiri

Archive | 1998

Microcomputer having variable bit width area for displacement and circuit for handling immediate data larger than instruction word

Shumpei Kawasaki; Eiji Sakakibara; Kaoru Fukada; Takanaga Yamazaki; Yasushi Akao; Shiro Baba; Toshimasa Kihara; Keiichi Kurakazu; Takashi Tsukamoto; Shigeki Masumura; Yasuhiro Tawara; Yugo Kashiwagi; Shuya Fujita; Katsuhiko Ishida; Noriko Sawa; Yoichi Asano; Hideaki Chaki; Tadahiko Sugawara; Masahiro Kainaga; Kouki Noguchi; Mitsuru Watabe

Archive | 1997

Division circuit and the division method thereof

Shumpei Kawasaki; Eiji Sakakibara; Kaoru Fukada; Takanaga Yamazaki; Yasushi Akao; Shiro Baba; Toshimasa Kihara; Keiichi Kurakazu; Takashi Tsukamoto; Shigeki Masumura; Yasuhiro Tawara; Yugo Kashiwagi; Shuya Fujita; Katsuhiko Ishida; Noriko Sawa; Yoichi Asano; Hideaki Chaki; Tadahiko Sugawara; Masahiro Kainaga; Kouki Noguchi; Mitsuru Watabe

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Keiichi Kurakazu

Hitachi

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Mitsuru Watabe

Hitachi

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Hideaki Chaki

Hitachi

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Masahiro Kainaga

Hitachi

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Kaoru Fukada

Hitachi

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Katsuhiko Ishida

Hitachi

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Shumpei Kawasaki

Hitachi

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Shuya Fujita

Hitachi

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Takanaga Yamazaki

Hitachi

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Toshimasa Kihara

Hitachi

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