Yuji Awano

Carbon Nanotubes for VLSI: Interconnect and Transistor Applications

We report the present status of Carbon Nanotube (CNT) CVD material technologies and their applications for via interconnects and FETs for VLSI. We succeeded in growing multi-walled CNTs (MWNTs) with the highest shell density (as high as 1013/cm2) and in fabricating via interconnects with high robustness against a high current density. We also report a Si-process compatible technique to control carrier polarity of Single-walled CNT (SWNT) FETs by utilizing fixed charges introduced by the gate oxide. High-performance p- and n-type CNT-FETs and CMOS inverters with stability in air have been realized.

Graphene for VLSI: FET and interconnect applications

Because of their remarkable physical properties, graphene should be one of the most important Emerging Research Materials (ERM) for not only the front-end but also back-end devices of VLSIs for the next decade. In this paper, we discuss the present status of their material technologies and some issues to be addressed for realizing graphene channels and wiring devices for a future LSI.

Ultralow contact resistivity in annealed titanium edge contacts for multilayered graphene

The structure dependence and electrical properties of a metal contact with multilayered graphene (MLG) have been investigated. We demonstrate the superiority of end- (or edge-) contact configurations for future three-dimensional (3D) interconnect applications. The contact resistivity of titanium end contacts can be lowered to 7.7 × 10−8 Ω cm2 by thermal annealing at 450 °C, which is 2 orders of magnitude lower than that of conventional top-contact configurations, and to the best of our knowledge, it is the lowest value ever reported for a pristine MLG. X-ray photoelectron spectroscopy (XPS) measurements revealed the formation of covalent-bonded titanium carbide as an interface layer between the metal layer and MLG.

Line width dependence of transport properties in graphene nanoribbon interconnects with real space edge roughness determined by Monte Carlo method

We developed a novel Monte Carlo simulation model to investigate the line width dependence of the transport properties of multi-layered graphene nanoribbon (GNR) interconnects with edge roughness. We reported that the line width dependence of carrier mobility decreases significantly as the magnitude of the edge roughness gets smaller, which agrees well with experiments. We also discussed the influence of the inelasticity of edge roughness scatterings, inter-layer tunneling, and line width dependent band structures on the line width of the GNR interconnects.

Electrical Resistivity Measurements of Layer Number Determined Multilayer Graphene Wiring for Future Large Scale Integrated Circuit Interconnects

To investigate the feasibility of nanocarbon interconnects for future LSIs, the electrical resistance of exfoliated multilayer graphene (MLG) wirings has been studied with accurate measurements of the number of layers. We employed transmission electron microscopy (TEM) as an exact number determination method, atomic force microscopy (AFM) as a simple method, and an extended optical contrast method as an easy distinction method, which we proposed for determining the number of layers. The sheet resistance of MLG wirings, including TEM determined 3-, 54-, and 341-layer MLGs, has been measured using the four-probe method and the layer number dependence of sheet resistance was discussed on the basis of a ladder circuit model simulation. It is shown that the dependence agrees well with the simulations, suggesting parallel conduction in MLG wirings, even if the probe electrodes are deposited just on the top layer of MLG.

Numerical simulations of high heat dissipation technology in LSI 3-D packaging using carbon nanotube through silicon via (CNT-TSV) and thermal interface material (CNT-TIM)

We report numerical simulations of heat dissipation properties of nano-carbon through silicon via (TSV), thermal interface material (TIM), and chip package towards a high heat dissipation LSI 3-D packaging. By using vertically aligned multi-walled CNTs (MWNTs) as both TSV and TIM materials and graphite as chip package, a boundary temperature just under a heat source decreased 40.8K in total, comparing to that using conventional materials. This result suggests superior heat dissipation properties of nano-carbon 3-D packaging.

Advanced quasi self-consistent Monte Carlo simulations of electrical and thermal properties of nanometer-scale gallium nitride HEMTs considering local phonon number distribution

As a means of investigating both the electrical and thermal properties of nanometer-scale electron devices within a reasonable computing time, we previously proposed a quasi-self-consistent Monte Carlo simulation method that used two new procedures: (i) a local temperature determination using the simulated phonon spatial distribution and feedback to update the electron-phonon scattering rates and (ii) a new algorithm which calculates long-time phonon transport by introducing different time increments for the electron and phonon transport. In this paper, to improve the quantitative accuracy and self-consistency of the simulation, we investigate an advanced Monte Carlo method considering (i) spatially dependent electron-phonon scattering rates that are calculated directly using a simulated phonon distribution (not the local temperature) taking into account (ii) the energy dependence of the phonon group velocity and phonon-phonon scattering rate and (iii) positive polarization charges due to piezoelectricity at the AlGaN/GaN interface. Using this advanced Monte Carlo method, we succeeded in simulating the current-voltage characteristics and thermal resistance of GaN HEMTs (High Electron Mobility Transistors), with which a quantitative evaluation could be made using actual devices. We also examined the convergence of this self-consistent Monte Carlo model.

Quasi self-consistent Monte Carlo particle simulations of local heating properties in nano-scale gallium nitride FETs

In this paper, we report our novel Monte Carlo quasi self-consistent particle simulation method for both electron and phonon transport in nanometer-sized electron devices. We developed two kinds of simulation procedures for the Monte Carlo method. First, we made a program to estimate the local temperature from a phonon spatial distribution, where we used a Bose-Einstein distribution function, the phonon density of states, and the phonon generation rate. Second, we developed an algorithm that made it possible to calculate multiple time scale phenomena of electron and phonon transport by introducing different time steps for electron and phonon transport simulations. With these methods, we succeeded in executing quasi self-consistent simulations of both electron and phonon transport in nanometer-channel FETs in consideration of saving computer processing time. Using these methods, we simulated the local heating properties of nanometer-scale gallium nitride FETs for the first time. Our FET model includes highly doped source and drain regions near the electrodes. It was found that phonon generation takes place mainly in the highly doped drain region, rather than in the high electric field regions of the channel or between the gate and drain. We discuss the physical basis of the spatial distributions of heat generation and local temperature in the GaN channel.

Carbon nanotubes for VLSI: Interconnect and transistor applications

We report the present status of Carbon Nanotube (CNT) CVD material technologies and their applications for via interconnects and FETs for VLSI. We succeeded in growing multi-walled CNTs (MWNTs) with the highest shell density (as high as 1013/cm2) and in fabricating via interconnects with high robustness against a high current density. We also report a Si-process compatible technique to control carrier polarity of Single-walled CNT (SWNT) FETs by utilizing fixed charges introduced by the gate oxide. High-performance p- and n-type CNT-FETs and CMOS inverters with stability in air have been realized.

Advanced quasi-self-consistent Monte Carlo simulations on high-frequency performance of nanometer-scale GaN HEMTs considering local phonon distribution

As a means of investigating both the electrical and thermal properties in nanometer-scale electron devices within a reasonable computing time, we previously proposed a quasi- self-consistent Monte Carlo simulation method, including spatially dependent electron-phonon scattering rates, and a replica technique for phonon generation which enable us to calculate long-time phonon transport. Using this advanced Monte Carlo method, we succeeded in simulating the high- frequency characteristics of nanometer-scale gallium-nitride high-electron-mobility transistors (HEMTs). The simulations suggest that a shorter gate HEMT exhibits larger performance degradation in cut-off frequency due to the local-heating effect. We also report Monte Carlo simulations of nm-scale GaN HEMTs with heat-removal structures on the surface.