Yuusuke Sato

Newly Developed High-Speed Rotating Disk Chemical Vapor Deposition Equipment for Poly-Si Films

We have developed high-speed rotating disk chemical vapor deposition (CVD) equipment. A high deposition rate, good thickness uniformity and few particles were achieved for polycrystalline silicon (poly-Si) film deposition on a 200-mm-diameter silicon (Si) wafer, by optimizing the structure of the rotating disk CVD equipment. A magnetic bearing motor was used for rotating and controlling the 200-mm-diameter wafer at 3000 rpm, and the substrate temperature was controlled to be 600–900°C. Gas flow was also controlled to avoid the re-adsorption of reaction by-products onto the wafer surface. A deposition rate of 316 nm/min, a film thickness nonuniformity ±3%, and less than 20 particles (over 200 nm in diameter) were achieved at a deposition temperature of 680°C for poly-Si deposition on the 200-mm-diameter wafer. These results show that the number of particles can be reduced even at a high deposition rate. The mechanisms of the high performance for poly-Si deposition are considered to be the reduction in the thickness of the boundary layer of temperature above the wafer surface and the suppression of the vapor-phase reaction.

Application of organic silicon cluster to patter transfer process for deep UV lithography

In this paper, organic silicon cluster is investigated as bottom anti-reflective coating (BARC) material compatible with the RIE mask for the substrate(oxide) etch in a thin resist process for deep UV lithography. It can be simply spin-coated and suppress reflection by single layer BARC process. Excellent etch properties closer to a-Si, namely high etch selectivity of resist:BARC during BARC etch and great etch resistance without deformation during oxide etch, are achieved.

Acceleration of CVD Step Coverage Simulation Applied to DSMC Method.

This paper describes acceleration of the numerical simulation for chemical vapor deposition (CVD) step coverage problems. The CVD process is used to deposit thin films during LSI production. The thin film deposition process is generally simulated using a combination of the direct simulation Monte Carlo (DSMC) method and trench profile evolution, but much time is required to compute a trench filling shape when sticking probability is small. In the present work, reduction of the computation time was achieved by parallel processing using an engineering workstation (EWS) network system and stick-at-all-the-reflection-points (SARP) method which was newly developed. In the former case, more than 85% parallel efficiency on a 20-EWS system was achieved. In the latter case, computation was more than 780000 times faster than by the conventional method when an experimental poly-Si deposition process was considered.

Simulation of CVD Step Coverage for SiH4 using Parallel Processing of DSMC Method

This paper describes the basic study of the simulation of chemical vapor deposition (CVD) step coverage that is used to estimate the deposition of thin films in LSI production. Given the trend toward extremely high density in the semiconductor manufacturing process, such as that of LSIs, the deposition process of silicon thin film on the circuit pattern needs to be accurate. To optimize the deposition of thin film around the trench of the order of less than a micron, computer simulations of the step coverage and of the film growth rate in the process are very important. In this simulation reported in this paper, the thin film deposition process, whose reaction is modeled as silicon from silane (SiH4) and silylene (SiH2), is solved using the direct simulation Monte Carlo (DSMC) method. The DSMC method is usually adopted in this case, but, since 1) this method solves the Boltzmann equation with a huge amount of molecular collisions and free motions and 2) sticking probability of molecules is of the order of 10-5 [1], even a high performance computer needs much time for this calculation. Although the performance of supercomputers and other types of computers is improving, the DSMC method as conventionally applied seems to be reaching its limit in terms of practicality.