Zhang Manhong

A novel 2-T structure memory device using a Si nanodot for embedded application

Performance and reliability of a 2 transistor Si nanocrystal nonvolatile memory (NVM) are investigated. A good performance of the memory cell has been achieved, including a fast program/erase (P/E) speed under low voltages, an excellent data retention (maintaining for 10 years) and good endurance with a less threshold voltage shift of less than 10% after 104 P/E cycles. The data show that the device has strong potential for future embedded NVM applications.

Fabrication of 11-nm-Wide Silica-Like Lines Using X-Ray Diffraction Exposure

Fine silica-like lines with 11 nm width are successfully fabricated using x-ray Fresnel diffraction exposure. X-rays pass a mask of 175-nm-wide lines and 125-nm-wide spaces and form sharp peaks on a wafer coated with a layer of hydrogen silsesquioxane resist (HSQ). By precisely controlling the mask-wafer gap at 10 μm using the laser interferogram method, the fine structures are defined on HSQ. Experimental images are reproduced by a simulation using the one-dimensional beam propagation method. This lithographic technique presents a novel and convenient way to fabricate fine silica-like structures and devices in nano-optical and nanoelectronic applications.

A simple and accurate method for measuring program/erase speed in a memory capacitor structure

With the merits of a simple process and a short fabrication period, the capacitor structure provides a convenient way to evaluate memory characteristics of charge trap memory devices. However, the slow minority carrier generation in a capacitor often makes an underestimation of the program/erase speed. In this paper, illumination around a memory capacitor is proposed to enhance the generation of minority carriers so that an accurate measurement of the program/erase speed can be achieved. From the dependence of the inversion capacitance on frequency, a time constant is extracted to quantitatively characterize the formation of the inversion layer. Experimental results show that under a high enough illumination, this time constant is greatly reduced and the measured minority carrier-related program/erase speed is in agreement with the reported value in a transistor structure.

Material properties and effective work function of reactive sputtered TaN gate electrodes

The resistivity, crystalline structure and effective work function (EWF) of reactive sputtered TaN has been investigated. As-deposited TaN films have an fcc structure. After post-metal annealing (PMA) at 900 °C, the TaN films deposited with a N2 flow rate greater than 6.5 sccm keep their fcc structure, while the films deposited with a N2 flow rate lower than 6.25 sccm exhibit a microstructure change. The flatband voltages of gate stacks with TaN films as gate electrodes on SiO2 and HfO2 are also measured. It is concluded that a dipole is formed at the dielectric-TaN interface and its contribution to the EWF of TaN changes with the Ta/N ratio in TaN, the underneath dielectric layer and the PMA conditions.

Theoretical study of strain-induced step configuration changes on vicinal Si(001) by the growth of Ge

The initial stage of growing Ge on single-domain vicinal Si(001) with a large angle of misorientation has been studied theoretically by the modified Keating model and compared with RHEED and STM experiments. The experimentally observed conversion from the DB step configuration, where all dimer rows are normal to the step edges, to a DA-like step configuration, where dimer rows on one terrace are parallel to the step edges, at Ge coverages larger than 1 ML is identified by our calculations. Our results show that this DA-like step is in fact a pair of steps of single atomic height: SA+SB, with a very wide SA terrace and an SB tooth of about 10 A. This new step configuration is energetically favoured over DA and DB step configurations.