Zhao Guangquan

Design of FIR Filters with Differential Evolution

Frequency sampling method is one of the usual methods in FIR digital filter design. In frequency sampling method the value of transition band samples are usually obtained by searching for table. However, the value obtained by searching for table can not be ensured to be optimal. In this paper a new application of differential evolution (DE) to frequency sampling method is introduced and its performance is compared to that of genetic algorithm (GA). Experimental results have shown that the value of transition band samples obtained by DE can be ensured to be optimal, also, it is seen that DE is significantly faster than GA for finding the optimum filter.

Design and implementation of satellite payload data loader

To meet the test requirements of a remote sensing satellite payload and data transmission system, the satellite payload data loader was designed and implemented based on the PXI & PXIE architecture. The payload data loader was divided into eight functional modules hierarchically with the modular design concept, such as high speed payload data simulators, low speed payload data simulator, payload data framing module and data transmission riser cards. In these modules, FPGA was used as the core controller, the flash array and compact flash card were adopted as the storage devices to achieve a single-board storage capacity of 128GB and peak reading and writing speed of over 100MB/s. The capacitive isolation technology was used to isolate satellite signals and ground signals. The payload data loader was used in the electrical testing of satellite, and played a significant role in the hierarchical test of satellite payload and data transmission system.

Research on Thermistor Simulation Based on Digital Potentiometer for Microsatellites

The simulation of thermistors plays an important role in micro satellite thermal control subsystem test. The simulation generally adopts the programmable resistors. However, the traditional programmable resistor module designed with relay switching precision resistor technology has its disadvantages, e.g. Low integration and short lifespan. To overcome these shortcomings, the thermistors simulation module based on digital potentiometer is designed and developed. The design adopts digital potentiometers as the core chips, a big resistance digital potentiometer and a small resistance digital potentiometer are connected to form the programmable resistors channel. DSP is used as the main controller in this design, it communicates with computer via RS-485 bus. Since digital potentiometers have big inherent error, the control values of digital potentiometers are calibrated. 32-channel programmable resistors ranging from 2kΩ to 200kΩ are integrated on a 160mm×100mm board. Due to the application of the digital potentiometers, the integration and lifespan of the module are greatly improved compared to traditional modules. The module has been applied in the test of micro satellites thermal control subsystem, the test results show that the module can meet the technical specifications.

Development of ground test equipment for autonomous system of deep space explorer

To fulfil the function test of PCM telecommand, BPSK telemetry, data transmission and payload data processing of deep space exploration autonomous systems, and to ensure the reliability of the autonomous system. Ground test equipment based on PXI & PXIe hybrid architecture was designed. According to the real function and interface of autonomous system, the ground test equipment was divided into telecommand & data transmission module, BPSK telemetry module and payload simulation module, and it implemented the simulation of TT&C, data transmission subsystem and 6 kinds of payloads, at the same time RS concatenated convolution decoding was realized in LabVIEW software. Through practical application, the receiving bit rate of the BPSK telemetry baseband signal is ranged from 128bps to 1024bps, and the receiving bit rate of data transmission is ranged from 8Kbps to 4096Kbps. Meanwhile, the transmitting bit rate of payload simulation can reach up to 50Mbps. The equipment can well meet the test requirements of autonomous system, and it plays an important role in function verification and ground test of autonomous systems of deep space explorer.

Development of appliqué Sensor Interface Module based on FPGA

Rapid satellite deployment is the primary goal of Space Plug-and-Play Architecture (SPA), the Appliqué Sensor Interface Module (ASIM) is necessary for Non-SPA compliant components to be converted into SPA compliant. Focusing on current ASIM not supporting power hot swap, a SPA-S (SpaceWire) ASIM with power hot swap capability was designed and developed. The FPGA was used to convert device-specific protocol to SPA protocol, the on-board flash was adopted to store xTEDS which describe SPA component information, and the 28V voltage power hot swap capability was realized by hot swap power manager. The SPA-S ASIM could convert Non-SPA components into SPA-S compliant. It means that the Non-SPA Component could be more effectively introduced into SPA system by the SPA-S ASIM.

Design and Implementation of Satellite General Equivalent Device

The satellite equivalent device is used to check the electrical interface of satellite ground power supply and distribution (PSD) test system and verify its functional correctness. Previous equivalent device is usually customized for particular satellite. A general equivalent device for satellite was designed and developed in this paper. Firstly, the design requirements and specifications of general equivalent device were proposed based on analyzing multiple satellite equivalent devices. Secondly, the hardware design was introduced, in which the input signal detection modules and output signal modules were designed independently. Then the software design was introduced, in which set of input/output mapping relation was flexible, and XML file was used to store the configuration information. The general equivalent device has been used in the self-test of satellite PSD test system, it is proved to be generic and flexible.

Design and implementation of simulator for AOS high-speed payload multiplexer

A small simulator for AOS high-speed payload multiplexer is designed and implemented based on the idea of satellite hierarchical test, which will be used in the test for satellite data transmission subsystem. The simulator uses the FPGA as control center, including multi-input and multi-output LVDS and RS422 interfaces. It caches the received payload data using the large-capacity SRAM dual caching technology, selects data downlink channel and downlink rate which both can be configured, uses a virtual channel (VC) scheduling algorithm based on the Consultative Committee for Space Data Systems (CCSDS) Advanced Orbiting Systems (AOS) data link protocol to make many kinds of VCs multiplexing physical downlink channel effectively. Finally multi-channel downlinks the payload data timely and correctly. The closed-loop path test results from the data source to the data receiving terminal show that the simulator can meet the technical requirements of the real satellite payload data high-speed multiplexer.