Zhuizhuan Yu
Texas A&M University
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Publication
Featured researches published by Zhuizhuan Yu.
international conference on acoustics, speech, and signal processing | 2008
Zhuizhuan Yu; Sebastian Hoyos; Brian M. Sadler
A parallel structure to do spectrum sensing in cognitive radio (CR) at sub-Nyquist rate is proposed. The structure is based on compressed sensing (CS) that exploits the sparsity of frequency utilization. Specifically, the received analog signal is segmented or time-windowed and CS is applied to each segment independently using an analog implementation of the inner product, then all the samples are processed together to reconstruct the signal. Applying the CS framework to the analog signal directly relaxes the requirements in wideband RF receiver front-ends. Moreover, the parallel structure provides a design flexibility and scalability on the sensing rate and system complexity. This paper also provides a joint reconstruction algorithm that optimally detects the information symbols from the sub-Nyquist analog projection coefficients. Simulations showing the efficiency of the proposed approach are also presented.
IEEE Transactions on Circuits and Systems | 2011
Xi Chen; Zhuizhuan Yu; Sebastian Hoyos; Brian M. Sadler; Jose Silva-Martinez
This paper presents a sub-Nyquist rate sampling receiver architecture that exploits signal sparsity by employing compressive sensing (CS) techniques. The receiver serves as an analog-to-information conversion system that works at sampling rates much lower than the Nyquist rate. A parallel-path structure that employs current mode sampling techniques is used. The receiver performance is quantified analytically. Useful and fundamental design guidelines that are unique to CS are provided based on the analytical tools. Simulations with a 90-nm CMOS process verify the theoretical derivations and the circuit implementations. Based on these results, it is shown that an instantaneous receiver signal bandwidth of 1.5 GHz and a signal-to-noise-plus-distortion ratio of 44 dB are achievable. The receiver power consumption is estimated to be 120.8 mW. A comparison with state-of-the-art high-speed analog-to-digital conversions reveals that the proposed approach improves the figure of merit by a factor of three if the signal exhibits a 4% sparsity.
international conference on ultra-wideband | 2008
Zhongmin Wang; Gonzalo R. Arce; Brian M. Sadler; José L. Paredes; Sebastian Hoyos; Zhuizhuan Yu
Operating at sub-Nyquist rate, compressed sensing (CS) has been successfully applied to the design of impulse ultra-wideband (I-UWB) receivers where Nyquist sampling is a formidable challenge. However, strong narrowband interference (NBI) can easily jam and saturate the receiver front-end and greatly degrade the system performance. In this paper, CS is applied to the design of I-UWB receivers with NBI mitigation. By exploiting the sparsity of the NBI within the pulse UWB spectrum, a compressive measurement matrix can be designed that is not only efficient at collecting signal energy, but also nulls out the NBI effectively. The performance analysis of the proposed receiver is provided. Simulation results show the effectiveness of the proposed method for UWB signal detection and NBI mitigation.
IEEE Journal on Emerging and Selected Topics in Circuits and Systems | 2012
Xi Chen; Ehab Ahmed Sobhy; Zhuizhuan Yu; Sebastian Hoyos; Jose Silva-Martinez; Samuel Palermo; Brian M. Sadler
This paper presents a sub-Nyquist rate data acquisition front-end based on compressive sensing theory. The front-end randomizes a sparse input signal by mixing it with pseudo-random number sequences, followed by analog-to-digital converter sampling at sub-Nyquist rate. The signal is then reconstructed using an L1-based optimization algorithm that exploits the signal sparsity to reconstruct the signal with high fidelity. The reconstruction is based on a priori signal model information, such as a multi-tone frequency-sparse model which matches the input signal frequency support. Wideband multi-tone test signals with 4% sparsity in 5~500 MHz band were used to experimentally verify the front-end performance. Single-tone and multi-tone tests show maximum signal to noise and distortion ratios of 40 dB and 30 dB, respectively, with an equivalent sampling rate of 1 GS/s. The analog front-end was fabricated in a 90 nm complementary metal-oxide-semiconductor process and consumes 55 mW. The front-end core occupies 0.93 mm2.
International Journal of Digital Multimedia Broadcasting | 2010
Zhuizhuan Yu; Xi Chen; Sebastian Hoyos; Brian M. Sadler; Jingxuan Gong; Chengliang Qian
Wideband spectrum sensing for cognitive radios requires very demanding analog-to-digital conversion (ADC) speed and dynamic range. In this paper, a mixed-signal parallel compressive sensing architecture is developed to realize wideband spectrum sensing for cognitive radios at sub-Nqyuist rates by exploiting the sparsity in current frequency usage. Overlapping windowed integrators are used for analog basis expansion, that provides flexible filter nulls for clock leakage spur rejection. A low-speed experimental system, built with off-the-shelf components, is presented. The impact of circuit nonidealities is considered in detail, providing insight for a future integrated circuit implementation.
IEEE Transactions on Circuits and Systems Ii-express Briefs | 2008
Pradeep Kotte Prakasam; Mandar Kulkarni; Xi Chen; Zhuizhuan Yu; Sebastian Hoyos; Jose Silva-Martinez; Edgar Sánchez-Sinencio
Transform-domain (TD) receivers expand the received signal over a basis set, and then operate on the basis coefficients. An analog computation of the basis coefficients efficiently parallelizes the signal for digital processing, relaxing the sampling requirements and enabling parallel digital processing at a much lower rate. Frequency-domain (FD) sampling, as a special case of TD sampling, has been proposed to parallelize the sampling process in broad-band communication receivers. The flexibility and scalability of TD receivers allow for the design of receivers that can cope with a large range of narrow-band and broad-band communications standards. A theoretical TD receiver design example is provided which is capable of processing GSM, Bluetooth, IEEE802.11g, Wimax, and UWB in just one configurable front-end. An example of spectrum sensing in cognitive radio is also provided.
systems, man and cybernetics | 2009
Zhuizhuan Yu; Sebastian Hoyos
We propose a novel parallel mixed-signal compressive spectrum sensing architecture for Cognitive Radios (CRs) with a detailed study of the signal modeling. The mixed-signal compressive sensing is realized with a parallel segmented compressive sensing (PSCS) architecture, which not only can filter out all the harmonic spurs that leak from the local random generator, but also provides a tradeoff between the sampling rate and the system complexity such that a practical hardware implementation is possible. We consider application of the architecture to do spectrum estimation, which is the first step for spectrum sensing in CRs. The benefit of prior knowledge about the input signals structure is explored and it is shown that this can be exploited in the PSCS architecture to greatly reduce the sampling rate.
IEEE Transactions on Circuits and Systems | 2011
Sebastian Hoyos; Srikanth Pentakota; Zhuizhuan Yu; Ehab Sobhy Abdel Ghany; Xi Chen; Ramy A. Saad; Samuel Palermo; Jose Silva-Martinez
Clock jitter is one of the most fundamental obstacles in realizing future generations of wideband receivers. Stringent jitter specifications in the sampling clocks of high-performance single-channel and multichannel time-interleaved analog-to-digital converters severely limit the evolution of baseband receivers. This paper presents an analytical framework for the design of clock-jitter-tolerant low-order multichannel filter-bank receivers, with techniques to dramatically lower the sampling-clock-jitter specifications. Although it is well understood that high-order frequency-channelized receivers provide higher tolerance to sampling jitter, this paper shows that low-order bandwidth-optimized multichannel receivers can achieve similar sampling-jitter tolerance. Additionally, this paper presents design tradeoffs and specifications of an example multichannel receiver that can process a 5-GHz baseband signal with 40 dB of signal-to-noise-ratio using sampling clocks that can tolerate up to 5 prmss clock jitter. In comparison, existing architectures based on time-interleaving require 0.5 prmss clock jitter for the given specifications. This extreme jitter tolerance allows for relaxed design of clocking systems, which averts a major roadblock in future wideband-communication-receiver development and provides the potential to enable several high-data-rate communication applications.
Physical Communication | 2012
Zhuizhuan Yu; Jun Zhou; Mario A. Ramirez; Sebastian Hoyos; Brian M. Sadler
Abstract Compressive sensing (CS) holds new promises for the digitization of wideband frequency-domain sparse signals at sub-Nyquist rate sampling without compromising the reconstruction quality. In this paper, the impact of ADC nonlinearity in a CS receiver for frequency-domain sparse signals is investigated. In a mixed-signal CS system, signals are randomized before sampling. The signal spectrum at each building block in the mixed-signal CS system is analyzed and compared to a conventional Nyquist-rate sampling system. It is shown that the signal randomization in a mixed-signal CS system is able to spread the spurious energy due to ADC nonlinearity along the signal bandwidth, rather than the concentration of harmonic distortion on a few frequencies as it is the case for a conventional ADC. As a result, this paper shows that a significant ADC SFDR (Spurious Free Dynamic Range) improvement is achieved in a CS receiver when processing sparse signals. Simulation results are reported which are in good agreement with the qualitative analysis.
2009 IEEE Dallas Circuits and Systems Workshop (DCAS) | 2009
Zhuizhuan Yu; Sebastian Hoyos
Analog Compressive Sensing (CS) provides a novel strategy to sample and process wideband sparse signals at sub-Nyquist rate. This scheme exploits the signal sparsity to reduce the sampling rate requirements. The analog compressive sensing system performance is greatly impacted by the accuracy of analog circuit components, especially with the scaling of CMOS technology. In this paper, the effect of the circuit imperfections in the analog compressive sensing architecture based on Parallel Segmented Compressive Sensing (PSCS) is discussed, such as the finite settling time, the timing uncertainty and so on. An iterative background calibration algorithm based on LMS (Least Mean Square) is proposed, which is shown to be able to effectively calibrate the error due to the circuit nonideal factors.