Zoran Radivojevic

Significance of Nanotechnology for Future Wireless Devices and Communications

This paper reviews the expected wide and profound impact of nanotechnology for future wireless devices and communication technologies.

Operating limits for RF power amplifiers at high junction temperatures

Abstract LDMOS RF––power amplifier components usually operate under severe conditions challenging long-term reliability. These components are subjected to high power dissipation and consequently high junction temperatures. Failure mechanisms are highly temperature dependent and driven by coupled electro-thermo-mechanical fields as a function of stress time. In this work we have investigated the reliability of such a component. Power cycling was used to assess its reliability by introduction of temperature gradients and transient at elevated junction temperatures. The experimental lifetime acceleration conditions provided transient thermal constraints to the thermo-mechanical strength of the silicon die. Power dissipation has been adjusted to cover a broad temperature range ( T j max : 200–300 °C) in the peak of a single power cycle. Different failure modes have been observed and related to the different temperature ranges. The experimental results have been combined with thermo-mechanical FE-simulations in ANSYS, leading to the validation of simulation models and implementation in a larger simulation network. The power cycling approach as applied in this paper provided a useful addition to the steady state reliability information. In this way, clear information about margins for safe operation under dynamical conditions has been obtained. This information is needed to fully exploit the functional capability of the component and avoid over-specification in the final application. Overall, the LDMOS RF–PA component showed excellent reliability which makes it suitable for application in telecom devices.

Novel materials for improved quality of RF-PA in base-station applications

New materials, design, and production technology have been introduced into laterally diffused metal oxide semiconductor (LDMOS) radio frequency power amplifier (RF-PA) transistors to provide advanced thermal features and increased thermal conductivity (K/sub th/). Recently, K/sub th/ of WCu flanges has been increased by nearly 25% from near 160W/mK to near 200W/mK. Further improvements in the latest generation of the RF-PA utilize novel flange materials such as Cu-laminate with even higher K/sub th/, by more than 25% compared to WCu. The development of Cu-laminate flange structures, involved optimization between achieving higher K/sub th/ and preserving desired mechanical properties for low stress and long-term reliability. Such optimization provided desired flatness for the RF-PA; yielding in lower interfacial thermal resistance between the RF-PA transistor flange and the next level heat sink. Furthermore, well characterized, highly thermally conductive, and very robust AuSi die attach was employed for efficient and reliable thermal coupling. Constellation of such materials and production technology improved overall quality of the RF-PA, enabling successful implementation in base-stations.

Electrotactile touch surface by using transparent graphene

In this work we present a flexible Electrostatic Tactile (ET) surface/display realized by using new emerging material graphene. The graphene is transparent conductor which successfully replaces previous solution based on indium-thin oxide (ITO) and delivers more reliable solution for flexible and bendable displays. The electrostatic tactile surface is capable of delivering programmable, location specific tactile textures. The ET device has an area of 25 cm2, and consists of 130 μm thin optically transparent (>76%) and mechanically flexible structure overlaid unobtrusively on top of a display. The ET system exploits electro vibration phenomena to enable on-demand control of the frictional force between the users fingertip and the device surface. The ET device is integrated through a controller on a mobile display platform to generate fully programmable range of stimulating signals. The ET haptic feedback is formed in accordance with the visual information displayed underneath, with the magnitude and pattern of the frictional force correlated with both the images and the coordinates of the actual touch in real time forming virtual textures on the display surface (haptic virtual silhouette). To quantify rate of change in friction force we performed a dynamic friction coefficient measurement with a system involving an artificial finger mimicking the actual touch. During operation, the dynamic friction between the ET surface and an artificial finger stimulation increases by 26% when the load is 0.8 N and by 24% when the load is 1 N.

Reliability prediction for TFBGA assemblies

One of the key hot topics in dense large scale integration packaging technologies is to reduce the thermomechanical stress caused by a mismatch of coefficients of thermal expansion among material employed. Nearly all manufacturers of portable electronics products perform several kinds of physical tests in the development cycle to evaluate reliability of the products. In this paper, results obtained by accelerated thermal and power cycling tests by using thin fine pitch gall grid array (TFBGA) packages are reported. Power-cycling stands for a lifetime acceleration method which is close to the real environmental conditions of many electronic products. For this purpose, a set of TFBGA thermal test packages were designed and manufactured for reliability assessment of solder joint interconnections. The assemblies consisted of an array of polysilicon resistors surrounding a sensing diode for accurate temperature measurements. The package uses a qualified bill of materials including a 36-mm2 dummy die. Each assembly was designed to perfectly reproduce the thermomechanical behavior of the mass production packages by several semiconductor manufacturers. This package is used in telecom wireless application where it offers high density input/output solution for advanced application-specific integrated circuit (IC) devices a system on chip ICs. Both experiments and simulations were carried out to locate the position of the most critical parts. Complexity of structural package characteristics was examined by using finite-element method modeling methodology. A strain energy based model was employed to locate the most vulnerable parts in the package and predict failure rates

Aluminium microcable technology for the ALICE silicon strip detector : a satus report

All interconnections in the ALICE Inner Tracker Silicon Strip Layers are realised using kapton/aluminium microcables, Tape Automated Bonding (TAB) and soldering techniques. The major advantages are the reduction in material budget and the increased mechanical flexibility as compared to traditional wirebonding. Since the last reports (Snowmass LHC workshop ’99) considerable progress has been made and designs have been refined and adapted to facilitate production, which will start early next year. This paper describes the design of the three major interconnection parts: • The TAB-frame chipcable connects the front-end chips to the detector and to the flex. These cables are mounted in carrier frames for testing and have unique coding to identify cable type as well as coding to check correct alignment in the test connector. • The flex is essentially a multi-layer interconnecting bus supplying power and control to the front-end chips, with integrated LVDS terminating resistors. The flex is the constructive basis of the hybrid, SMD components can be mounted by soldering or gluing as well as by means of TAB bonds. Ultrasonic bonding and pulsed-bar reflow soldering techniques are used to interconnect the flex to the other parts. • The laddercable is a 60 cm long cable connecting the front-end modules to the endcaps. This flatcable is designed as a differential stripline for analog and LVDS signals using ultra-low density polyimide foam as spacer material. Optical and electrical testing of microcables and scanning techniques to inspect TAB-bonds connections are also discussed.

Alice Silicon Strip Detector Module Assembly with Single-Point TAB Interconnections

The silicon strip detector (SSD) modules cover the two outermost layers of Inner Tracking System of ALICE. The SSD collaboration performs the module assembly in several locations in Europe. Mass production of the SSD modules was launched during autumn 2004 and presently all the sites are producing the SSD modules successfully. The bonding yield of spTAB interconnections is approaching close to 100%. This paper describes the assembly phases and bond process development for SSD modules, including discussion on the most probable rootcauses of failures and the long-term reliability of the interconnections.

Finger gesture extraction from an integrated optical touch panel based on mathematical morphology

The paper presents a reliable method of extracting finger 2D gestures on an optical touch panel. All the testing data is captured from an optical AMLCD under the normal office lighting. The experimental results show that the method is efficient to correctly extract one or more-finger gestures from the shadow of finger(s) on the AMLCD. Development of such a method contributes to simplification of hardware requirements for reliable detection technique

Transient IR imaging of light and flexible microelectronic devices

An advanced method for the quality assessment of microelectronic assemblies has been developed by combining IR thermography and several techniques for stimulation by transient temperature fields. The method exploits singularities in materials and interconnections by the observation of perturbations in transient heat flow phenomena. For very light microelectronic systems like chip-on-flex assemblies a method was developed taking advantage of short stimulations by photoflash. Such a method provided possibilities for detecting defects on the level of a single interconnection with a pitch of 80 μm. In addition, a programmable array of thermo-electric converters, prepared for the testing of a large variety of microelectronic assemblies, was also used to perform transient IR imaging for chip-on-flex assemblies.

Scanning white light interferometry in quality control of single-point tape automated bonding

We report on using a Scanning White Light Interferometer (SWLI) for quality control of aluminum lead single-point Tape Automated Bonding (spTAB). A spTAB process was used to connect 14 μm thick, 42 μm wide aluminum leads on a 12 μm thick polyimide layer to a micro chip. Three different bonding process parameters were varied in order to maximize the pull force: bond force, ultrasonic power, and ultrasonic time. A custom built SWLI was used to measure the topography of the bonds in order to find features that correlate with the tensile bond force. This force was obtained in a destructive way by a pull test. By keeping the bond height within 3±1.5 μm, bonds with acceptable tensile forces in excess of 54 mN were obtained. This was verified by a separate validation measurement where the pull force of bonds complying with the height requirement was recorded.