Zulkifli Abd Majid

Development of DNA sequencing accelerator based on Smith Waterman algorithm with heuristic divide and conquer technique for FPGA implementation

In this paper, a new approach is introduced to reduce the complexity of the Smith Waterman algorithm for FPGA implementation. We have developed the technique for the fastest comparison of the two DNA sequencing using Verilog on the Xilinx ISE 7.1. The Simulation has been running on the ModelSim XE III 6.0. The combinational delay for the proposed smith waterman algorithm based on divide and conquers technique sequencing is 10.214 ns while the original is 10.295 ns. We have proved that smith waterman algorithm based on divide and conquers technique gives better performance than existing technique.

High speed DNA sequencing accelerator using FPGA

This paper presents the development of High Speed DNA sequencing accelerator based on Smith-Waterman algorithm using FPGA. The scope of the paper focuses on speed optimization with parallelism. Smith-Waterman algorithm is sensitive algorithm used for procedure of DNA sequence alignments in computational molecular biology. As the number of sequence database increase exponentially, it affects the performance of Smith-Waterman algorithm in general purpose computer. Therefore, several techniques have been developed in order to speed up the crucial sequence comparison processes. Hence, optimization technique which used parallelism approach has been utilized. Moreover, the technique, which was previously used in cluster computing, has been exploited and implemented on FPGA technology. The potential of FPGAs implementation is vast in term of cost reduction, faster speed and parallelism. The design has been described using Verilog HDL and target to Altera Cyclone II 2C70. In this paper we introduce the new technique of DNA sequencing algorithm with 10 based pair DNA sequences been aligned at single clock cycle. The result of compilation consisting of 821 logic elements with total cell delay 10.472 ns and total interconnect delays 17.592 ns.

Improved characterization and modeling of PZT thin film capacitors

Sputtered lead zirconate titanate (PZT) thin films are proposed as new dielectric material for monolithic microwave integrated circuit (MMIC) thin film capacitors to replace currently available silicon nitride-based MMIC because it offers higher permittivity that will lead to circuit size reduction. The titanate films were sputtered on Pt/Ti/SiO2 coated, undoped silicon wafers. Capacitors with 50 times 50 mum2 electrode area were formed on the PZT layer using electron beam lithography. This paper reports on the improved characterization and modeling of the devices. Results of this study show that the 50 times 50 mum2 capacitor exhibit capacitance values of almost 14 pF and PZT relative permittivity of 300.

Potential of Graph Theory Algorithm Approach for DNA Sequence Alignment and Comparison

Today, the need for high performance computation method for align biological sequence has increased due to exponential growth of biological sequence databases. Therefore, this paper is an attempt to study and investigate the potential of graph theory algorithm approach for optimizing the alignment process of DNA sequences towards determines the region of common between two or more DNA sequences. This study will initially involve the modification of algorithms, mathematical formulation, logic design, simulation, verification and implementation of graph-theory algorithms in DNA sequences alignment context. The design and simulation was carried out using Altera Quartus II version 7.2 EDA software and targeted to Altera Cyclone II FPGA. As a result, the proposed DNA sequences alignment using graph theory algorithm able to determine the optimal path for four DNA sequences base-pair in two clock cycle with reduction 71.42% compare to Smith Waterman algorithm. Finally, the new proposed DNA sequences using graph theory algorithm alignment can accelerate the process of DNA sequences alignment faster than existing DNA sequences alignment on hardware accelerator.

Comparative study for DNA data minimization technique on FPGA

Data minimization technique and existing DNA sequence data representation is compared and presented in this paper. The architecture of these two modules is compared and analyzed to study the complexity and performance characteristics of the system when dealing with large DNA sequences data on FPGA. These two technique is designed, synthesized and simulated using Altera Quartus II version 9.1 and targeted to Altera Cyclone II FPGA EP2C35 for determine the performance and complexity characteristic when running with DNA sequences data. Simulation results presented in this paper show it effects and feasibility when dealing with DNA sequences data on FPGA platform.

High-sensitivity gas detection and monitoring system for high-risk welding activity

This study attempted to investigate and design a new mechanism in monitoring safety by detecting gas concentration levels to prevent an explosion during welding activities at a high-risk site. The objective of this project was to design and develop a new safety precaution monitoring system during welding activity using a low-cost microcontroller to improve the current practice. The study was conducted by dividing the project into three stages: sensing, controlling, and notification. At the sensing stage, different gas concentration levels have been tested and analyzed to determine the safety range or level. However, the controller part managed the responses based on the detection of gas in the environment. Indicator and secure digital memory have been used to notify and record the activity during the operation. In the environment test, the system starts to trigger when sensing the level produced at 1.416 V, which represents 30% of the gas concentration. Nevertheless, the gas sensor required a 10-second initialized time to stabilize and produce the desired sensing level. At the end of this paper, the system has been successfully designed, developed, and tested at the prototype level.

Improved data minimization technique in reducing memory space complexity for DNA local alignment accelerator application

Improved data minimization technique to optimize the length of DNA sequence and alignment result characters representation is presented in this paper. The primary objective is to improve and optimize data representation for DNA sequences alignment and result character. The proposed design change in algorithm and architecture is presented in this paper. Algorithm design based on binary equivalent method is used to obtain the optimal size of characters representation. The code is written, compiled and simulated using Altera Quartus II Version 9.0 EDA tools. Verilog Hardware Description Language (HDL) and Altera Cyclone II EP2C35 FPGA are used as coding language and target device respectively. In addition, the structural modelling technique is used to reduce the design complexity. Simulation result showed that the improved data minimization technique takes 50% more memory compared to previous work, but it covers 6 DNA sequences and alignment result characters.

Sequence alignment using systolic array for an accelerator

Performance and large memory space are the most prominent issues highlighted for local DNA sequences alignment. Therefore, this study is an attempt to test the systolic array approach for Smith-Waterman (SW) algorithm for improving the performance of DNA sequence alignment accelerator. The design was developed using LabVIEW and targeted to Xilinx Spartan 3E while the original SW has been used as a benchmark for performance comparison. Systolic array SW has recorded better performance as compared to original SW. Thus, by applying systolic array concept, it will improve the alignment performance whilst minimize the complexity of the design.

Design and development of DNA fragment assembly using IWP method

From time to time, researchers always try to improve algorithm for DNA fragment assembly that using de Bruijn graph. A de Bruijn graph is one of graph theoretical approach that based on short words (k-mers) that is ideal for high coverage, very short read (25-50bp) data sets. Therefore, the content of this paper proposed the development of DNA fragment assembly by using one of method that applied de Bruijn graph to construct complete a sequence, called Idury Waterman and Pevzner method. The algorithm was developed using Verilog HDL in Xilinx ISE Design Suite 14.2. The simulation used VCS Synopsys tool. The simulation result shows that it is tally with the theoretical analysis and was presented well in this paper.

Design and analysis of 13.56MHz RFID antenna based on modified wheeler equation: A practical approach

An RFID tag antenna in coil form with typical credit card dimension (78mm × 41mm) which is suitable for ISO 14443 standards was built virtually in Electromagnetic simulator and its result was later validated with identical physical antennas. A simplified equation of inductance in microstrip form by H. A. Wheeler is then compared to result found using data from the simulation and modified to fit it. Consecutively, specific matching impedance for each coil is calculated which the matching impedance represents an RFID tag plus its compensation impedance. The coil and the matching impedance will then be modelled in an RF system simulator and its impedance plot will be explained.