A. Godoy

A Comprehensive Study of the Corner Effects in Pi-Gate MOSFETs Including Quantum Effects

In this paper, simulation-based research on the electrostatics of Pi-gate silicon-on-insulator (SOI) MOSFETs is carried out. To do so, a 2-D self-consistent Schrodinger-Poisson solver has been implemented. The inclusion of the quantum effects has been demonstrated to be necessary for the accurate simulation of these devices in the nanometer range. Specifically, this paper is focused on the corner effects in multiple-gate SOI MOSFETs, defined as the formation of independent channels with different threshold voltages. Corner effects are studied as a function of different parameters, such as the doping density, silicon-fin dimensions, corner rounding, and gate oxide thickness. Finally, the relation between corner effects and the transition from a fully to a partially depleted body is analyzed.

Erratum: Analytic Model for the Surface Potential and Drain Current in Negative Capacitance Field-Effect Transistors

In 2008, Salahuddin and Datta proposed that a ferroelectric material operating in the negative capacitance (NC) region could act as a step-up converter of the surface potential in a metal-oxide-semiconductor structure, opening a new route for the realization of transistors with steeper subthreshold characteristics (S <; 60mV/dec). In this paper, a comprehensive physics-based surface potential and a drain current model for the NC field-effect transistor are reported. The model is aimed to evaluate the potentiality of such transistors for low-power switching applications. This paper also sheds light on how operation in the NC region can be experimentally detected.

Acoustic phonon confinement in silicon nanolayers: Effect on electron mobility

We demonstrate the confinement of acoustic phonons in ultrathin silicon layers and study its effect on electron mobility. We develop a model for confined acoustic phonons in an ideal single-layer structure and in a more realistic three-layer structure. Phonon quantization is recovered, and the dispersion relations for distinct phonon modes are computed. This allows us to obtain the confined phonon scattering rates and, using Monte Carlo simulations, to compute the electron mobility in ultrathin silicon on insulator inversion layers. Thus, comparing the results with those obtained using the bulk phonon model, we are able to conclude that it is very important to include confined acoustic phonon models in the electron transport simulations of ultrathin devices, if we want to reproduce the actual behavior of electron transport in silicon layers of nanometric thickness.

Modeling the Centroid and the Inversion Charge in Cylindrical Surrounding Gate MOSFETs, Including Quantum Effects

A semiempirical model was developed for calculating the inversion charge of cylindrical surrounding gate transistors (SGTs), including quantum effects. To achieve this goal, we used a simulator that self-consistently solves the 2-D Poisson and Schrodinger equations in a cross section of the SGT. By means of the proposed models, we correctly reproduced the simulation data for a wide range of the device radius and gate voltage values. Both the inversion charge and the centroid models consist of simple mathematical equations within an explicit calculation scheme suitable for use in circuit simulators.

Electron mobility in double gate silicon on insulator transistors: Symmetric-gate versus asymmetric-gate configuration

We have studied electron mobility behavior in asymmetric double-gate silicon on insulator (DGSOI) inversion layers, and compared it to the mobility in symmetric double-gate silicon on insulator devices, where volume inversion has previously been shown to play a very important role, being responsible for the enhancement of the electron mobility. Poisson’s and Schroedinger’s equations have been self-consistently solved in these structures to study and compare the distribution of the electrons. We show that the lack of symmetry in the asymmetric DGSOI structure produces the loss of the volume inversion effect. In addition, we show that as the silicon thickness is reduced the conduction effective mass of electrons in asymmetric devices is lower than that in the symmetric case, but that the greater confinement of electrons in the former case produces a stronger increase in the phonon scattering rate, and in the surface roughness scattering rate. We have solved the Boltzmann transport equation by the Monte Carl...

The Multivalley Effective Conduction Band-Edge Method for Monte Carlo Simulation of Nanoscale Structures

The trend toward continuous integration of the nanometer scale and the rise of nonconventional device concepts such as multigate transistors present important challenges for the semiconductor community. Simulation tools have to be adapted to this new scenario where classical approaches are not sufficiently accurate, and quantum effects have to be taken into account. This paper proposes a method of including quantum corrections in Monte Carlo (MC) simulations without solving the Schroumldinger equation. The approach, based on the effective conduction band-edge (ECBE) method, considers the effects of an arbitrary effective mass tensor, describing valley characteristics and confinement directions while avoiding the use of effective mass as a fitting parameter. The performance of the multivalley ECBE method is tested using an ensemble MC simulator to study benchmark devices for next International Technology Roadmap for Semiconductors technological nodes, a 25-nm channel length bulk-MOSFET and a double-gate silicon-on-insulator MOSFET in both steady-state and transient situations

A simple subthreshold swing model for short channel MOSFETs

Abstract A new approach to calculate the subthreshold swing of short channel bulk and silicon-on-insulator metal oxide semiconductor field effect transistors is presented. The procedure utilizes a channel-potential expression appropriate for submicron dimensions. The final result is similar to that used for long channels except for a factor λ which represents the short channel effects. Comparison with different published results reveals excellent quantitative agreement.

A Simple Approach to Quantum Confinement in Tunneling Field-Effect Transistors

We present an approach to account for quantum confinement in tunneling field-effect transistors (TFETs) based on the use of a nonlocal band-to-band tunneling model for carrier injection along with a self-consistent Schrödinger-Poisson model. Confinement will be considered to take place in one dimension, with the corresponding subband quantization of the conduction and valence bands derived from it. As a result of this quantization, the formerly continuous conduction and valence bands become forbidden states, and tunneling is assumed to occur between their first bound states. This causes an increase of the effective bandgap and, subsequently, of the tunneling barrier width, which greatly affects the total current in the device. Results corresponding to double-gate TFETs with different thicknesses show clear differences in their transfer characteristics when comparing the quantum approach including confinement to the semiclassical one.

Impact of Quantum Confinement on Gate Threshold Voltage and Subthreshold Swings in Double-Gate Tunnel FETs

We investigate how the inclusion of quantum confinement in double-gate tunneling field-effect transistors (DG-TFETs) modifies the conventional behavior of electrical parameters of utmost importance in these devices, such as subthreshold swings (point and average) and the gate threshold voltage. We make use of a simple approach that allows us to incorporate a quantum-mechanical description in which the discreteness of subband energy levels causes a significant reduction in the band-to-band tunneling probabilities. The inclusion of quantum confinement along with a nonlocal band-to-band model for tunneling is shown to greatly affect the aforementioned parameters as key issues for the characterization of these novel devices.

Strained-Si/SiGe-on-insulator inversion layers: The role of strained-Si layer thickness on electron mobility

We show by Monte Carlo simulation that electron mobility is greater when strained-silicon inversion layers are grown on SiGe-on-insulator substrates than when unstrained-silicon-on-insulator devices are employed (as experimentally observed). However, the electron mobility in strained-Si/SiGe-on-insulator inversion layers is strongly dependent on the strained-silicon layer thickness, TSi, due to an increase of the phonon scattering, which partially counteracts the increase in the mobility achieved by the strain. This effect is less important as the germanium mole fraction, x, is reduced, and as the value of TSi increases.