Aaron Dingler

Shape Engineering for Controlled Switching With Nanomagnet Logic

We demonstrate that in circuits and systems that comprised of nanoscale magnets, magnet-shape-dependent switching properties can be used to perform Boolean logic. More specifically, by making magnets with slanted edges, we can shift the energy barrier of the device (i.e., so that it is not at a maximum when a device is magnetized along its geometrically hard axis). In clocked systems, we can leverage this barrier shift to make and or or gates that are not majority based. Advantages include reduced gate footprint and interconnect overhead as we eliminate one gate input. In this paper, we report and discuss micromagnetic simulations that illustrate how magnet shape can facilitate nonmajority-gate-based, reduced footprint logic; preliminary fabrication and testing results that illustrate that shape engineering can induce energy barrier shifts; and additional micromagnetic simulations that show other ways in which we might leverage shape in circuits made from nanoscale magnets.

Bridging the gap between nanomagnetic devices and circuits

This paper looks at designing circuit elements that will be constructed with nanoscale magnets within the Quantum-dot Cellular Automata (QCA) computational paradigm. In magnetic QCA (MQCA) logical operations and dataflow are accomplished by manipulating the polarizations of nanoscale magnets. Wires and gates have already been experimentally demonstrated at room temperature. However, to realize more complex circuits - and eventually systems - more than just wires and gates in isolation are required. For example, gates must be inter-connected, signals must cross, etc. All structures must be controlled by the envisioned drive circuitry. In this paper, structures that will facilitate these circuit-level tasks are presented for the first time.

Performance and Energy Impact of Locally Controlled NML Circuits

This article quantitatively considers the performance of nanomagnetic logic circuits within the context of realistic drive circuitry. We also demonstrate how one of the five fundamental tenets of digital logic---preventing unwanted feedback---can be satisfied by realistic drive circuitry. More specifically, different types of multiphase clocks are investigated and compared. Initial projections suggest that even with drive circuitry overhead, nanomagnet logic can outperform subthreshold CMOS in terms of energy delay product---and paths to lower power exist.

System-level energy and performance projections for nanomagnet-based logic

This paper examines how realistic implementations of the drive circuitry needed to control circuit elements made from nano-scale magnets can affect system-level energy and performance. Expected non-uniform clock fields, clock field discontinuities and out-of-plane fields are all considered. We find that realistic fabrication mechanisms should not inhibit logical correctness and that this technology appears capable of outperforming low power CMOS equivalents with similar energy requirements - and paths to additional energy savings exist.

Controlling Magnetic Circuits: How Clock Structure Implementation will Impact Logical Correctness and Power

Circuits based on magnetic logic have shown great promise as an extremely low power alternative to CMOS based circuits. However, the success or failure of such circuits hinges on the existence of a locally controllable and low power clock field. Existing work has largely assumed the availability of such a clock field that would be almost impossible to fabricate or that exhibits an ideal distribution in space. This paper uses a fabricatable clock structure proposed in [10] as the basis to investigate all possible non-ideal properties (due to fabrication limitations and variations) of the resulting clock field. How such a clock impacts the logical correctness of a magnetic circuit element is verified via micromagnetic simulation. The impact on performance and power is also considered.

Making non-volatile nanomagnet logic non-volatile

Field-coupled nanomagnets can offer significant energy savings at iso-performance versus CMOS equivalents. Magnetic logic could be integrated with CMOS, operate in environments that CMOS cannot, and retain state without power. Clocking requirements lead to inherently pipelined circuits, and high throughput further improves application-level performance. However, bit conflicts - that will occur in defect free, pipelined ensembles - can make non-volatile logic volatile. Assuming a field-based clock, we present hardware designs to improve steady state non-volatility, and explain how design enhancements could increase clock energy. We then suggest materials-related design levers that could simultaneously deliver non-volatility and low clock energy.

Boolean and non-boolean nearest neighbor architectures for out-of-plane nanomagnet logic

We present the design and simulation of information processing hardware that is comprised of single domain, Co/Pt magnets (i.e., out-of-plane nanomagnet logic - or oNML). We first describe the design and evaluation of oNML hardware that can identify instances of a preprogrammed bit sequence in streaming data. Systolic arrays (that process information using Boolean logic gates) are employed as a system-level architecture which can (i) mitigate less desirable features of the oNML device architecture (nearest neighbor dataflow and longer device switching times when compared to a CMOS transistor), and (ii) exploit unique features of the device architecture (non-volatility and inherently pipelined logic with no overhead). We conclude the paper with a discussion as to how oNML might be employed for non-Boolean information processing. A simple image processing function is used as an initial case study.

Design Tradeoffs for Improved Performance in MQCA-Based Systems

This paper looks at circuits and systems made from nanoscale magnets. We leverage physical level simulation to show how to extend initial experimental work - where wires and gates with nanometer feature sizes have been demonstrated at room temperature - to show how one might make design tradeoffs to improve both the performance and reliability of more complex systems.

Design of Stochastic Computing Circuits Using Nanomagnetic Logic

We consider the design of stochastic computing (SC) hardware based on spintronic devices. SC offers low-cost implementations of arithmetic operations and high degrees of error tolerance. When compared to charge-based devices, spin-based devices could be lower energy, nonvolatile, etc. However, spin-based devices can be fundamentally more error prone than charge-based devices. The marriage of SC architectures and spin-based devices has the potential to produce information processing systems that are robust, low energy, and nonvolatile. In this paper, we investigate SC hardware comprised of nanomagnetic logic (NML) devices. NML is a “beyond-CMOS” technology that uses bistable magnets to store, process, and move binary information. We introduce new NML circuit structures that exploit unique features of the technology to efficiently realize hardware components required for an SC system (e.g., random number generation). We also benchmark NML-based SC circuits against other implementations, and illustrate how features that are unique to NML (e.g., inherent pipelining) can lead to improved performance. Our results indicate NML SC implementations achieve smaller area footprints with reduced energy and delay when compared to CMOS equivalents.