Adrian Carbine

Pentium(R) Pro processor design for test and debug

This paper describes the Design for Test (DFT) and silicon debug features of the Pentium(R) Pro processor, and its production test development methodology. The need to quickly ramp a complex, high-performance microprocessor into high-volume manufacturing with low defect rates led the design team to a custom low-area DFT approach, coupled with a manually-written test methodology which targeted several fault models. Results show that this approach was effective in balancing testability needs with other design constraints, while enabling excellent time to market and test quality.

Pentium Pro processor design for test and debug

The need to quickly ramp a complex, high-performance microprocessor into high-volume manufacturing with low defect rates led this design team to a custom, low-area DFT approach and a manually written test methodology that targeted several fault models. Their approach effectively balanced testability needs with other design constraints, while enabling excellent time to market and test quality.

DPDAT: data path direct access testing

Data Path Direct Access Test, DPDAT, supports efficient structural test of targeted datapath blocks using existing non-datapath DFT features in conjunction with architectural transparency already present in surrounding datapath blocks. This new DFT technique allows ATPG patterns generated at logic block levels to be applied at the full chip without expensive DFT overhead. The results of investigating feasibility on Intel(R) Pentium(R) 4 show existence of these natural transparent paths, low area overhead and high fault coverage using sequential ATPG techniques under DPDAT.