Alberto Rodriguez

Design-Oriented Analysis and Performance Evaluation of a Low-Cost High-Brightness LED Driver Based on Flyback Power Factor Corrector

This paper presents a new control strategy for power factor correctors (PFCs) used to drive high-brightness light-emitting diodes (HB-LEDs). This control strategy is extremely simple and is based on the use of standard peak-current-mode integrated controllers (PCMICs), reducing its cost and complexity in comparison to traditional PFC controllers. In fact, this method is an alternative implementation of the one-cycle control to PFCs belonging to the flyback family of converters, without introducing high complexity for reducing the total harmonic distortion. In this case, the use of a simple exponential compensation ramp instead of a linear one is the proposed solution for drawing a sinusoidal input current. Moreover, the line current is cycle-by-cycle controlled, and therefore, the input-current feedback loop is extremely fast, which allows the use of this type of control with high-frequency lines. The proposed idea is to apply this simple control to a one-stage PFC in order to design a low-cost ac-dc HB-LED driver. However, the application of this control strategy to PFC belonging to the flyback family of converters is not obvious. Design-oriented considerations about its implementation in PCMIC will be provided. Finally, an experimental prototype of this driver was developed.

Optimizing the efficiency of a dc-dc boost converter over 98% by using commercial SiC transistors with switching frequencies from 100 kHz to 1MHz

In this paper an evaluation of Silicon Carbide (SiC) transistors currently available in the commercial market is presented. An experimental performance comparison between SiC JFET, Si MOSFET-SiC JFET cascode configuration and SiC MOSFET used as the main switch for a dc/dc boost converter (150 V/400 V) operating in Discontinuous Conduction Mode (DCM) is presented. The comparison of the different SiC devices is made in terms of the global boost-converter efficiency. Several experimental results dealing with the switching behavior of these SiC switches at different switching frequencies (from 100 kHz to 1 MHz) have been carried out in order to optimize the efficiency of the converter at different output power (300 W and 600 W). A good performance of all these switches is obtained from the point of view of the efficiency, highlighting the Si MOSFET-SiC JFET cascode behavior at 1MHz with an efficiency of 97.5% at 600 W. In addition, a possible application in the field of solar panels is proposed using the SiC JFET as the main switch. Continuous Conduction Mode (CCM) and DCM are tested at different switching frequencies with an output power of 1 kW and the results obtained are compared to the most widely reported in the bibliography.

Switching performance comparison of the SiC JFET and the SiC JFET/Si MOSFET cascode configuration

Silicon Carbide (SiC) devices are becoming increasingly available in the market due to the fact that its manufacturing process is more mature. Many are their advantages with respect to the silicon (Si) devices as, for example, higher blocking capability, lower conduction voltage drop and faster transitions, which makes them more suitable for high-power and high-frequency converters. The purpose of this paper is to study the switching behavior of the two configurations more-widely studied in the literature using SiC devices: the normally-on SiC JFET and the cascode using a normally-on SiC JFET and a low-voltage Si MOSFET. A comparison regarding the turn-on and turn-off losses of both configurations is detailed and the results are verified with the experimental efficiency results obtained in a boost converter operating in both Continuous Conduction Mode (CCM) and Discontinuous Conduction Mode (DCM). Furthermore, a special attention will be focused on the switching behavior of the cascode configuration and the effect of its low-voltage MOSFET is analyzed and different Si devices are compared. The study carried out will confirm that the overall switching losses of the JFET are lower, making it more suitable to operate in CCM in terms of the global efficiency of the converter. Nevertheless, the lowest turn-off losses of the cascode highlight this device as the most appropriate one for DCM when ZVS is achieved at the turn-on of the main switch. Finally, all theoretical results have been verified by an experimental 600W boost converter.

Different purpose design strategies and techniques to improve the performance of a Dual Active Bridge with phase-shift control

This paper addresses the performance of the bidirectional Dual Active Bridge (DAB) converter. One of the advantages of the DAB is the possibility to achieve Zero Voltage Switching (ZVS) operation in all the switches of this converter. However, the ZVS operation range can be lost for light loads, especially if high voltage is required in at least one of the DAB ports and the phase-shift control is used to regulate the power processed by the converter. Theoretically simple averaged model is presented for the DAB converter. Using the study presented in this paper, the boundaries of ZVS operation can be easily evaluated. The proposed models and analysis of the ZVS boundaries allow the proposal and evaluation of two different design strategies with different purposes: on the one hand, increasing the ZVS operation range and, on the other, improving efficiency at full load. Moreover, some techniques are presented for increasing the ZVS operation range and improving the efficiency of the DAB at full load (both using phase-shift control) employing the aforementioned analysis to obtain certain design criteria and conclusions. Finally, the proposed models, design strategies and techniques to improve the performance of the DAB are experimentally tested using a 1kW prototype with input and output voltages of 48V and 400V, respectively.

Increasing the voltage and the switching frequency in a dual active bridge using a normally-on SiC JFET in a cascode configuration

Silicon Carbide (SiC) transistors are becoming increasingly available in the market due to the fact that its manufacturing process is more mature. These new semiconductors have several advantages compared with traditional Silicon (Si) devices, such as, for example, higher voltage blocking capability, lower conduction voltage drop and faster transitions, which make them more suitable for high-power and high-frequency converters. The introduction of these new devices in switching power supply systems provides better performance enabling higher frequencies and consequently smaller, lighter and cheaper systems. Moreover, the increasing demand of an intermediate storage of electrical energy in battery systems has resulted in the need of bidirectional DC/DC power converters with galvanic isolation, for example due to the use of renewable energy or the incoming traction applications. A Dual Active Bridge (DAB) is a bidirectional DC/DC converter often used in these applications. This topology presents the advantages of soft-switching commutations, low cost, and high efficiency. Therefore, the use of this topology is proposed for applications where power density, cost, weight, and reliability are critical factors. This paper is focused in the inclusion of commercially available SiC transistors in a DAB converter taking advantage of the characteristic of these devices, as their good switching performance and their high voltage blocking capability. The main goal is to increase the voltage of the input or output voltage in a DAB and also to increase the switching frequency at the same time.

Using standard peak-current-mode controllers in high-power-factor rectifiers based on up-down switching converters

This paper deals with a new control method for power factor correctors based on flybackpsilas family converters (e.g., Buck-Boost, Flyback, SEPIC, Cuk and Zeta). The control is carried out by a standard IC controller for peak current-mode dc-dc converters, with only an exponential compensation ramp and a peak detector or low pass filter. Neither analog multiplier nor input voltage sensor are needed to achieve quasi-sinusoidal line waveforms, which makes this method very attractive. The method is similar to the one-cycle control method, but it does not need the use of either two matched integrators or a current sensor with an integrator with reset. Moreover, the line current is cycle-by-cycle controlled and, therefore, the input current feedback loop is extremely fast, which allows the use of this type of control with high frequency lines.

Transfer Time Suppressor (TTS) for line-interactive Uninterruptible Power Supplies

Passive standby and line-interactive uninterruptible power supplies (UPSs) have lower cost and size than double conversion UPS and their efficiency is higher. On the other hand, their voltage regulation is poor (or non-existent) during the normal mode of operation. Moreover, both UPSs have a transfer time (also defined as switching time) from normal mode to stored energy mode when the utility power fails. During this switching time (a few milliseconds), the load is still connected to the grid and, therefore, it is affected by the abnormal line conditions. In previous papers, authors proposed different methods for filling voltage notches in line-interactive UPSs. In this paper, a method which eliminates not only notches, but also voltage surges, is proposed. It is based on two capacitors charged one with positive and the other with negative voltage. If any abnormal line condition takes place in the, for example, positive period, the positive capacitor is connected to the load. This connection is then modulated in order to obtain a sinusoidal waveform. This method can make line-interactive UPS more competitive than the double conversion UPS in many situations and cases.

Study of the Power Factor Correctors with fast output-voltage feedback loop

When a power factor corrector (PFC) is designed with a fast output-voltage feedback loop, the study of the power stage changes in comparison with the one carried out with a slow output-voltage feedback loop. This is a consequence of the voltage ripple that appears in the control signal. A study of the static behaviour of a PFC with fast output-voltage feedback loop is carried out in this paper by using two parameters: the module of the relative voltage ripple of the control signal and its phase angle. These parameters do not change with the load and they determine the line total harmonic distortion (THD) and the power factor (PF) at the input of the PFC. Moreover, these parameters also determine the maximum power handled by the converter according to the EN 61000-3-2 regulations in class A and in class B. On the other hand, when the converter must comply with the EN 61000-3-2 regulations in class C or in class D, the compliance does not depend on the power handled by the PFC and not all the possible combinations of the relative voltage ripple of the control signal and its phase angle achieve compliance with the above mentioned regulations. Finally, the study has been experimentally verified.

Low cost system for transistor modeling

If we were to teach a group of students the characteristics of device modeling, we could miss a practical process to obtain the different elements of the model. However, the instruments we would need to get our aim could reach a quite high price. Besides, there is a high risk of break down due to students lack of experience. That is why it has been designed a measurement system which will not reach a very high cost and will, on the other hand, increase is own safety.