M. Arias

On the Limit of the Output Capacitor Reduction in Power-Factor Correctors by Distorting the Line Input Current

Active power-factor correctors (PFCs) are needed to design ac-dc power supplies with universal input voltage range and sinusoidal input current. The classical method to control PFCs consists in two feedback loops and an analog multiplier. Hence, the input current is sinusoidal and it is in-phase with the input voltage. However, a bulk capacitor is needed to balance the input and the output power. Due to its high capacitance, an electrolytic capacitor is traditionally used as a bulk capacitor in PFCs. As a consequence, the lifetime of the ac-dc power supply is limited by the electrolytic capacitors, which becomes insufficient to some applications (e.g., high-brightness LEDs). This paper proposes a reduction of the output voltage ripple (which allows reduction of the output capacitance) by distorting the input current, but maintaining the harmonic continent compatible with EN 61000-3-2 regulations. The limits of this output capacitor reductions are deduced. Also, a control strategy based on a low-cost microcontroller is developed to put the proposed study into practice. Finally, the theoretical results are validated in a 500-W prototype.

Design-Oriented Analysis and Performance Evaluation of a Low-Cost High-Brightness LED Driver Based on Flyback Power Factor Corrector

This paper presents a new control strategy for power factor correctors (PFCs) used to drive high-brightness light-emitting diodes (HB-LEDs). This control strategy is extremely simple and is based on the use of standard peak-current-mode integrated controllers (PCMICs), reducing its cost and complexity in comparison to traditional PFC controllers. In fact, this method is an alternative implementation of the one-cycle control to PFCs belonging to the flyback family of converters, without introducing high complexity for reducing the total harmonic distortion. In this case, the use of a simple exponential compensation ramp instead of a linear one is the proposed solution for drawing a sinusoidal input current. Moreover, the line current is cycle-by-cycle controlled, and therefore, the input-current feedback loop is extremely fast, which allows the use of this type of control with high-frequency lines. The proposed idea is to apply this simple control to a one-stage PFC in order to design a low-cost ac-dc HB-LED driver. However, the application of this control strategy to PFC belonging to the flyback family of converters is not obvious. Design-oriented considerations about its implementation in PCMIC will be provided. Finally, an experimental prototype of this driver was developed.

Tapped-Inductor Buck HB-LED AC–DC Driver Operating in Boundary Conduction Mode for Replacing Incandescent Bulb Lamps

High-brightness light-emitting diodes (HB-LEDs) are recognized as being potential successors of incandescent bulb lamps due to their high luminous efficiency and long lifespan. To achieve these advantages, HB-LED ballast must be durable and efficient. Furthermore, for this specific application, ac-dc HB-LED ballast requires a high-step-down ratio, high power factor and low cost. This paper presents a tapped-inductor buck power factor corrector (PFC) operating in boundary conduction mode design for replacing incandescent bulb lamps. This low-cost solution presents a suitable high-step-down ratio without galvanic isolation in order to produce an output voltage of about 20 V from line voltage. In addition, the tapped-inductor buck PFC maintains high efficiency in comparison to other one stage solutions widely used to design low-cost ac-dc HB-LED drivers (e.g., flyback PFCs). Static analysis, input current distortion analysis, and an average small signal model of the tapped-inductor buck PFC have been implemented in this paper both to check the validity of the proposed solution and to provide a suitable design procedure of the ac-dc HB-LED driver. Finally, a 12-W experimental prototype was developed to validate the theoretical results presented.

Limitations of the Flyback Power Factor Corrector as a One-Stage Power Supply

Low cost passive power factor correction solutions and single-stage integrated converters cannot draw a sinusoidal input current and are only suitable solutions for low power levels. Power factor correctors (PFC) with a multiplier solve this drawback, but need a second-stage DC/DC converter to obtain fast output voltage dynamics. However, the output voltage response of a PFC can be improved by increasing the bandwidth of the error amplifier of the output voltage feedback loop. So, a one-stage PFC can be used as complete power supply when an extremely fast output response is not required. Nevertheless, increasing error amplifier bandwidth compromises design, making it more difficult to comply with IEC 61000-3-2 standards. This paper analyzes the application limits of the Flyback PFC as a complete power supply. The thrust of the paper is to establish the Flyback PFC as a solution for PFC topologies depending on power level, input voltage range, output voltage, output response and line current harmonic content. Static and dynamic models have been included in this study. Finally, theoretical results are validated using a 600 W prototype.

Optimizing the efficiency of a dc-dc boost converter over 98% by using commercial SiC transistors with switching frequencies from 100 kHz to 1MHz

In this paper an evaluation of Silicon Carbide (SiC) transistors currently available in the commercial market is presented. An experimental performance comparison between SiC JFET, Si MOSFET-SiC JFET cascode configuration and SiC MOSFET used as the main switch for a dc/dc boost converter (150 V/400 V) operating in Discontinuous Conduction Mode (DCM) is presented. The comparison of the different SiC devices is made in terms of the global boost-converter efficiency. Several experimental results dealing with the switching behavior of these SiC switches at different switching frequencies (from 100 kHz to 1 MHz) have been carried out in order to optimize the efficiency of the converter at different output power (300 W and 600 W). A good performance of all these switches is obtained from the point of view of the efficiency, highlighting the Si MOSFET-SiC JFET cascode behavior at 1MHz with an efficiency of 97.5% at 600 W. In addition, a possible application in the field of solar panels is proposed using the SiC JFET as the main switch. Continuous Conduction Mode (CCM) and DCM are tested at different switching frequencies with an output power of 1 kW and the results obtained are compared to the most widely reported in the bibliography.

Simple droop voltage control system for parallel operation of UPS

Uninterruptible power supply systems are very valuable nowadays for many reasons as they prevent critical systems from shutting down when the mains fails. Safety systems in airports, hospitals, banks etc cannot be turned off at any moment. As the power needs can grow when systems are upgraded, the UPS rated power should also grow. Then, there are two options: buying a more powerful UPS or upgrading the system adding a new small UPS in parallel. This option is very interesting for manufacturers because it is very versatile and large systems can be powered with small UPS. However, AC paralleling is always controversial because phase and voltage amplitude match should be guaranteed. This paper presents a prototype using a very simple system to allow UPS to be paralleled. When the AC output is obtained from a battery, there is usually a step-up converter to boost the input voltage and a dc-ac stage connected in cascade. Therefore, the output voltage amplitude can be controlled changing the dc bus voltage instead of changing the modulation ratio of the inverter PWM signal, making possible to operate the inverter stage without amplitude regulation. As a consequence, parallel connection of the UPSs becomes similar to paralleling dc converters, and well known methods used in dc-dc converters can also be used in this case. Two 3 kW UPSs prototypes using the proposed system have been built and tested to compare theoretical and experimental results.

A very simple control strategy for power factor correctors driving high-brightness light-emitting diodes

This paper presents a new control strategy for Power Factor Correctors (PFCs) used to drive High-Brightness Light- Emitting Diodes (HB-LEDs). This control strategy is extremely simple and it is based on the use of a conventional peak current- mode controller with a suitable selection of the compensation ramp waveform. In these conditions, an almost perfect sinusoidal line current is obtained at full load in the case of a topology based on the Boost converter. If the converter belongs to the Flyback family (Flyback, Buck-Boost, SEPIC, Cuk and Zeta), the line waveform appears notably distorted if the compensation ramp is a linear ramp, but becomes almost sinusoidal if the linear ramp is substituted by a properly chosen exponential waveform. The line waveform is slightly distorted when dimming control is implemented or when the converter works in either over-voltage or under-voltage conditions. However, the waveform maintains a very high Power Factor even in these conditions. Moreover, the line current is cycle-by-cycle controlled due to the peak current- mode control and, therefore, the input current feedback loop is extremely fast, thereby allowing this type of control to be used with high frequency lines (above 400 Hz).

Using the Loss-Free Resistor Concept to Design a Simple AC–DC HB-LED Driver for Retrofit Lamp Applications

Currently acknowledged as a rapidly emerging technology, high-brightness light-emitting diodes (HB-LEDs) are considered the true alternative to many mature technologies (i.e., incandescent bulbs, compact fluorescent lamps, etc.) due to their high efficiency, low maintenance, and durability. It is evident that the HB-LED driver must be durable and efficient to achieve these advantages. Moreover, in the case of replacing incandescent bulbs, the ac-dc HB-LED driver needs to be low cost and to have a high enough power factor (PF) to comply with international regulations. This paper presents a new proposal to design a simple low-cost ac-dc HB-LED driver for retrofit bulb lamps. The proposed solution originates from a very simple concept: the use of a switching-mode power supply (SMPS) acting as a loss-free resistor (LFR) connected in series with the rectified mains to shape the line input current. For the proposed application, it is obvious that the LFR needs to have a very simple topology to be economical. However, efficiency cannot be ignored. This paper proposes the flyback converter working as an LFR connected in series with the rectified mains, operating in boundary conduction mode (BCM) in order to improve its efficiency. First, a static analysis of the proposed concept will be presented. A distortion analysis of the input current of the proposed ac-dc HB-LED driver will then be carried out to test compliance with international regulations. Finally, two 12-W experimental prototypes have been built and tested in order to validate the theoretical results presented in this paper. These results show the proposed ac-dc HB-LED driver to be a low-cost high-efficiency quasi-sinusoidal input current option for designing retrofit lamps.

Switching performance comparison of the SiC JFET and the SiC JFET/Si MOSFET cascode configuration

Silicon Carbide (SiC) devices are becoming increasingly available in the market due to the fact that its manufacturing process is more mature. Many are their advantages with respect to the silicon (Si) devices as, for example, higher blocking capability, lower conduction voltage drop and faster transitions, which makes them more suitable for high-power and high-frequency converters. The purpose of this paper is to study the switching behavior of the two configurations more-widely studied in the literature using SiC devices: the normally-on SiC JFET and the cascode using a normally-on SiC JFET and a low-voltage Si MOSFET. A comparison regarding the turn-on and turn-off losses of both configurations is detailed and the results are verified with the experimental efficiency results obtained in a boost converter operating in both Continuous Conduction Mode (CCM) and Discontinuous Conduction Mode (DCM). Furthermore, a special attention will be focused on the switching behavior of the cascode configuration and the effect of its low-voltage MOSFET is analyzed and different Si devices are compared. The study carried out will confirm that the overall switching losses of the JFET are lower, making it more suitable to operate in CCM in terms of the global efficiency of the converter. Nevertheless, the lowest turn-off losses of the cascode highlight this device as the most appropriate one for DCM when ZVS is achieved at the turn-on of the main switch. Finally, all theoretical results have been verified by an experimental 600W boost converter.

The Voltage-controlled compensation ramp: A new waveshaping technique for Power Factor Correctors

This paper deals with a new control method for Power Factor Correctors. Control is carried out by a standard IC controller for peak current-mode dc-dc converters, with only an additional compensation ramp generator and peak detector. Neither an analog multiplier nor an input voltage sensor is needed to achieve quasi-sinusoidal line waveforms, which makes this method very attractive. The method is similar to the one-cycle control method, but can be very easily adapted for use with topologies different to the boost converter, i.e. flyback, buck-boost, SEPIC Cuk and Zeta topologies. Moreover, as the line current is cycle-by-cycle controlled, the resulting input current feedback loop is extremely fast, thus allowing the use of this type of control with high frequency lines.