Alexandra C. Ford
University of California, Berkeley
Network
Latest external collaboration on country level. Dive into details by clicking on the dots.
Publication
Featured researches published by Alexandra C. Ford.
Nano Letters | 2009
Alexandra C. Ford; Johnny C. Ho; Yu-Lun Chueh; Yu-Chih Tseng; Zhiyong Fan; Jing Guo; Jeffrey Bokor; Ali Javey
Temperature-dependent I-V and C-V spectroscopy of single InAs nanowire field-effect transistors were utilized to directly shed light on the intrinsic electron transport properties as a function of nanowire radius. From C-V characterizations, the densities of thermally activated fixed charges and trap states on the surface of untreated (i.e., without any surface functionalization) nanowires are investigated while enabling the accurate measurement of the gate oxide capacitance, therefore leading to the direct assessment of the field-effect mobility for electrons. The field-effect mobility is found to monotonically decrease as the radius is reduced to <10 nm, with the low temperature transport data clearly highlighting the drastic impact of the surface roughness scattering on the mobility degradation for miniaturized nanowires. More generally, the approach presented here may serve as a versatile and powerful platform for in-depth characterization of nanoscale, electronic materials.
Nano Letters | 2013
Steven Chuang; Qun Gao; Rehan Kapadia; Alexandra C. Ford; Jing Guo; Ali Javey
Ballistic transport of electrons at room temperature in top-gated InAs nanowire (NW) transistors is experimentally observed and theoretically examined. From length dependent studies, the low-field mean free path is directly extracted as ~150 nm. The mean free path is found to be independent of temperature due to the dominant role of surface roughness scattering. The mean free path was also theoretically assessed by a method that combines Fermis golden rule and a numerical Schrödinger-Poisson simulation to determine the surface scattering potential with the theoretical calculations being consistent with experiments. Near ballistic transport (~80% of the ballistic limit) is demonstrated experimentally for transistors with a channel length of ~60 nm, owing to the long mean free path of electrons in InAs NWs.
Applied Physics Letters | 2009
Johnny C. Ho; Alexandra C. Ford; Yu-Lun Chueh; Paul W. Leu; Onur Ergen; Kuniharu Takei; Gregory Smith; Prashant Majhi; Joseph Bennett; Ali Javey
One of the challenges for the nanoscale device fabrication of III-V semiconductors is controllable postdeposition doping techniques to create ultrashallow junctions. Here, we demonstrate nanoscale, sulfur doping of InAs planar substrates with high dopant areal dose and uniformity by using a self-limiting monolayer doping approach. From transmission electron microscopy and secondary ion mass spectrometry, a dopant profile abruptness of ∼3.5 nm/decade is observed without significant defect density. The n+/p+ junctions fabricated by using this doping scheme exhibit negative differential resistance characteristics, further demonstrating the utility of this approach for device fabrication with high electrically active sulfur concentrations of ∼8×1018 cm−3.
Applied Physics Letters | 2011
Alexandra C. Ford; Chun Wing Yeung; Steven Chuang; Ha Sul Kim; E. Plis; Sanjay Krishna; Chenming Hu; Ali Javey
An ultrathin body InAs tunneling field-effect transistor on Si substrate is demonstrated by using an epitaxial layer transfer technique. A postgrowth, zinc surface doping approach is used for the formation of a p+ source contact which minimizes lattice damage to the ultrathin body InAs compared to ion implantation. The transistor exhibits gated negative differential resistance behavior under forward bias, confirming the tunneling operation of the device. In this device architecture, the ON current is dominated by vertical band-to-band tunneling and is thereby less sensitive to the junction abruptness. The work presents a device and materials platform for exploring III–V tunnel transistors.
Nano Letters | 2008
Yu-Lun Chueh; Alexandra C. Ford; Johnny C. Ho; Zachery A. Jacobson; Zhiyong Fan; Chih-Yen Chen; Li-Jen Chou; Ali Javey
The formation of crystalline NixInAs and NixInAs/InAs/NixInAs heterostructure nanowires by the solid source reaction of InAs nanowires with Ni is reported for the first time. The fundamental kinetics of the Ni/InAs alloying reaction is explored, with the Ni diffusion reported as the rate determining step. The diffusivity of Ni is independent of the nanowire diameter, with an extracted diffusion activation energy of approximately 1 eV/atom. The metallic NixInAs exhibits a modest resistivity of approximately 167 micro omega x cm for diameters >30 nm, with the resistivity increasing as the nanowire diameter is further reduced due to the enhanced surface scattering. The alloying reaction readily enables the fabrication of NixInAs/InAs/NixInAs heterostructure nanowire transistors for which the length of the InAs segment (i.e., channel length) is controllably reduced through subsequent thermal annealing steps, therefore enabling a systematic study of electrical properties as a function of channel length. From the electrical transport studies, an electron mean free path on the order of a few hundred nm is observed for InAs NWs with a unit length normalized, ON-state resistance of approximately 7.5 k omega/microm. This approach presents a route toward the fabrication for high performance InAs nanowire transistors with ohmic nanoscale contacts and low parasitic capacitances and resistances.
Nano Letters | 2012
Alexandra C. Ford; S. Bala Kumar; Rehan Kapadia; Jing Guo; Ali Javey
One-dimensional (1D) sub-bands in cylindrical InAs nanowires (NWs) are electrically mapped as a function of NW diameter in the range of 15-35 nm. At low temperatures, stepwise current increases with the gate voltage are clearly observed and attributed to the electron transport through individual 1D sub-bands. The 2-fold degeneracy in certain sub-band energies predicted by simulation due to structural symmetry is experimentally observed for the first time. The experimentally obtained sub-band energies match the simulated results, shedding light on both the energies of the sub-bands as well as the number of sub-bands populated per given gate voltage and diameter. This work serves to provide better insight into the electrical transport behavior of 1D semiconductors.
Applied Physics Letters | 2011
Kee Cho; Daniel J. Ruebusch; Min Hyung Lee; Jae Hyun Moon; Alexandra C. Ford; Rehan Kapadia; Kuniharu Takei; Onur Ergen; Ali Javey
Semiconductor nanopillar arrays with radially doped junctions have been widely proposed as an attractive device architecture for cost effective and high efficiency solar cells. A challenge in the fabrication of three-dimensional nanopillar devices is the need for highly abrupt and conformal junctions along the radial axes. Here, a sulfur monolayer doping scheme is implemented to achieve conformal ultrashallow junctions with sub-10 nm depths and a high electrically active dopant concentration of 1019–1020 cm−3 in arrays of InP nanopillars. The enabled solar cells exhibit a respectable conversion efficiency of 8.1% and a short circuit current density of 25 mA/cm3. The work demonstrates the utility of well-established surface chemistry for fabrication of nonplanar junctions for complex devices.
Nanotechnology | 2012
Toshitake Takahashi; Patricia L. Nichols; Kuniharu Takei; Alexandra C. Ford; Arash Jamshidi; Ming C. Wu; C. Z. Ning; Ali Javey
Spatially composition-graded CdS(x)Se(1-x) (x = 0-1) nanowires are grown and transferred as parallel arrays onto Si/SiO(2) substrates by a one-step, directional contact printing process. Upon subsequent device fabrication, an array of tunable-wavelength photodetectors is demonstrated. From the spectral photoconductivity measurements, the cutoff wavelength for the device array, as determined by the bandgap, is shown to cover a significant portion of the visible spectrum. The ability to transfer a collection of crystalline semiconductor nanowires while preserving the spatially graded composition may enable a wide range of applications, such as tunable lasers and photodetectors, efficient photovoltaics, and multiplexed chemical sensors.
Nano Letters | 2010
Alexandra C. Ford; Steven Chuang; Johnny C. Ho; Yu-Lun Chueh; Zhiyong Fan; Ali Javey
Gas phase p-doping of InAs nanowires with Zn atoms is demonstrated as an effective route for enabling postgrowth dopant profiling of nanostructures. The versatility of the approach is demonstrated by the fabrication of high-performance gated diodes and p-MOSFETs. High Zn concentrations with electrically active content of approximately 1 x 10(19) cm(-3) are achieved which is essential for compensating the electron-rich surface layers of InAs to enable heavily p-doped structures. This work could have important practical implications for the fabrication of planar and nonplanar devices based on InAs and other III-V nanostructures which are not compatible with conventional ion implantation processes that often cause severe lattice damage with local stoichiometry imbalance.
Physical Chemistry Chemical Physics | 2013
Szu-Ying Chen; Chiu-Yen Wang; Alexandra C. Ford; Jen-Chun Chou; Yi-Chung Wang; Fengyun Wang; Johnny C. Ho; Hsiang-Chen Wang; Ali Javey; Jon-Yiew Gan; Lih-Juann Chen; Yu-Lun Chueh
The influence of the catalyst materials on the electron transport behaviors of InAs nanowires (NWs) grown by a conventional vapor transport technique is investigated. Utilizing the NW field-effect transistor (FET) device structure, ~20% and ~80% of Au-catalyzed InAs NWs exhibit strong and weak gate dependence characteristics, respectively. In contrast, ~98% of Ni-catalyzed InAs NWs demonstrate a uniform n-type behavior with strong gate dependence, resulting in an average OFF current of ~10(-10) A and a high I(ON)/I(OFF) ratio of >10(4). The non-uniform device performance of Au-catalyzed NWs is mainly attributed to the non-stoichiometric composition of the NWs grown from a different segregation behavior as compared to the Ni case, which is further supported by the in situ TEM studies. These distinct electrical characteristics associated with different catalysts were further investigated by the first principles calculation. Moreover, top-gated and large-scale parallel-array FETs were fabricated with Ni-catalyzed NWs by contact printing and channel metallization techniques, which yield excellent electrical performance. The results shed light on the direct correlation of the device performance with the catalyst choice.