Alfons W. Bogalecki

Optical sources, integrated optical detectors and optical waveguides in standard silicon CMOS integrated circuitry

A series of light emitting devices were designed and realized with a standard 2 micron CMOS technology, 1.2 micron CMOS technology and 0.8 micron Bi-CMOS integrated circuit fabrication technology. The devices operated in the reverse breakdown avalanche mode, at voltage levels of 8 - 20 V and in the current range 80 (mu) A - 10 mA. The devices emit visible light in the 450 - 750 nm wavelength region at intensity levels of up to 1 nWmicrometers -2 (10 mW.cm-2). A series of optimized optical detectors were developed using the same technologies in order to detect lateral and glancing incidence visible and infrared radiation optimally. A series of waveguiding structures of up to 100 micron in length were designed and realized with CMOS technologies by utilizing the field oxide, the inter- metallic oxides and the aluminum metal layers as construction elements. Signal levels ranging from 60 nA to 1 micro-amperes could be detected at the detectors of waveguiding structures of up to 100 micron in length. Finally, a complete optoelectronic integrated circuit was designed and simulated with 0.8 micron Bi-CMOS technology with some of the developed light sources, detectors, waveguiding structures and added driving and amplification circuitry. In particular a very powerful high gain wide- bandwidth MOSFET signal amplifiers was developed that could be successfully integrated in the optoelectronic integrated circuit. The developed technologies show potential for application of optoelectronic circuits in next generation silicon CMOS integrated circuits.

An 8×64 pixel dot matrix microdisplay in 0.35-μm complementary metal-oxide semiconductor technology

Microdisplay technologies for near-to-eye applications mostly use a complementary metal-oxide semiconductor (CMOS) processing chip as backplane for pixel addressing, with extensive post-processing on top of the CMOS chip to deposit organic LED or liquid crystal layers. Here, we examine the possibility of integrating emissive microdisplays within the CMOS chip, with absolutely no post processing needed. This will dramatically reduce the manufacturing cost of microdisplays and may lead to new microdisplay applications. Visible electroluminescence is achieved by biasing pn junctions into avalanche breakdown mode. The most appropriate CMOS pn junction is selected and innovative tech- niques are applied to increase the light extraction efficiency from the CMOS chip using the metal layers of the CMOS process. An 8 × 64 dot matrix microdisplay was designed and manufactured in a 0.35-μm CMOS technology. The experimental results show that a luminance level of 20 cd∕m 2 can be reached, which is an adequate luminance value in order to comfortably read data being displayed in relatively dark environ- ments. The electrical power dissipation per pixel being activated is 0.9 mW∕pixel. It is also shown that the pixels can be switched at a rate faster than 350 MHz.

High-speed CMOS optical communication using silicon light emitters

The idea of moving CMOS into the mainstream optical domain remains an attractive one. In this paper we discuss our recent advances towards a complete silicon optical communication solution. We prove that transmission of baseband data at multiples of megabits per second rates are possible using improved silicon light sources in a completely native standard CMOS process with no post processing. The CMOS die is aligned to a fiber end and the light sources are directly modulated. An optical signal is generated and transmitted to a silicon Avalanche Photodiode (APD) module, received and recovered. Signal detectability is proven through eye diagram measurements. The results show an improvement of more than tenfold over our previous results, also demonstrating the fastest optical communication from standard CMOS light sources. This paper presents an all silicon optical data link capable of 2 Mb/s at a bit error rate of 10-10, or alternatively 1 Mb/s at a bit error rate of 10-14. As the devices are not operating at their intrinsic switching speed limit, we believe that even higher transmission rates are possible with complete integration of all components in CMOS.

High frequency optical integrated circuit design and first iteration realisation in standard silicon CMOS integrated circuitry

A prototype silicon CMOS optical integrated circuit (Si CMOS OEIC) was designed and simulated using standard 0.8 /spl mu/m Bi-CMOS silicon integrated circuit technology. The circuit consisted of an integrated silicon light emitting source, an optical wave-guiding structure, two integrated optical detectors and two high-gain CMOS trans-impedance based analogue amplifiers. Simulations with MicroSim PSpice software predict a typical mean bandwidth capability of 185 MHz for the trans-impedance amplifier for detected photo-currents at the input of the amplifier in the range of 1 nA to 100 nA and driving a 10 k/spl Omega/ load. First iteration waveguiding structures were realised in 1.2 /spl mu/m CMOS technology for various source-waveguide-detector arrangements. Signal coupling ranging from 1 nA to 1 /spl mu/A was detected at the detectors. The technology seems favourable for first-iteration implementations as diverse opto-electronic applications in silicon - CMOS integrated circuitry.

Nanoscale SOI silicon light source design for improved efficiency

Silicon-on-insulator (SOI) is becoming an important technology platform in nanometer scale CMOS integrated circuits. The platform offers a number of distinct advantages over bulk CMOS for materializing silicon light sources based on hot carrier luminescence. This work describes the design of nanoscale silicon structures for enhanced light emission with improved power efficiency, which allows the use of SOI light sources in short-haul optical communication links with extended possibilities for other applications. It has been shown experimentally that reducing the dimensions of the active material results in an improvement of electroluminescent power emitted from forward-biased pn-junctions. Previously published results show a similar trend for light sources based on hot carrier luminescence. Building on our previous work in SOI light sources, multiple fingerlike junctions are manufactured in an arrayed fashion for coupling into large diameter core optical fibers for CMOS optical communications up to a few hundred meters. The manufacturing methodology and associated challenges are discussed for the scaling down of device dimensions, and difficulties in realizing the structures are investigated. The optical power characteristics are discussed as well as the spectral nature of emission along with the advantages and disadvantages thereof. This work compares different architectures of light sources that were implemented where a comparison is drawn between previous SOI devices as well as bulk CMOS. We believe the improved SOI light sources are fully compatible with modern CMOS technologies based on SOI and may provide such technologies with a much needed light source as part of the circuit designer’s toolkit.

Using reach-through techniques to improve the external power efficiency of silicon CMOS light emitting devices

For CMOS silicon-based light emitting devices to become practical the external power efficiency must be increased. In this paper a reach-through technique is described whereby the external power efficiency can be increased as a result of three phenomena: i) increase in internal quantum efficiency, ii) increase in light extraction efficiency, and iii) lower operating voltage. The three techniques are discussed and the factor 7 improvement in external power efficiency will be described in terms of the electrical characteristics as well as the external radiation patterns.

Integrated optical light directing structures in CMOS to improve light extraction efficiency

The directionality and external optical power of CMOS light sources was improved a factor 3.9 by implementing integrated light reflectors in an unmodified CMOS process. Implementing such reflectors successfully demonstrated a CMOS micro-display and a 350 MHz Si optical communication link.

Improved efficiency of CMOS light emitters in punch through with field oxide manipulation

Avalanche electroluminescence offers the opportunity for standard CMOS devices to be used as light emitters. Although inefficient, avalanche breakdown is inherently a fast process and potentially offers benefits in terms of speed when compared to emission based on forward biased junctions. Furthermore, the wide spectral characteristics of avalanche electroluminescence in the visible range also allows for some interesting applications. The main obstacle suppressing the use of these silicon light emitters in mainstream applications is inefficient radiative recombination. A number of techniques are known to improve quantum efficiency, one of which is operating the devices in punch through mode. This work focuses on improved results obtained from punch through devices, manipulation of the oxide above the radiative action and interesting results pertaining to the radiation pattern and the effects of LOCOS structures on the emission shape. This information could potentially benefit optical coupling to the light sources.

CMOS dot matrix microdisplay

Display technologies always seem to find a wide range of interesting applications. As devices develop towards miniaturization, niche applications for small displays may emerge. While OLEDs and LCDs dominate the market for small displays, they have some shortcomings as relatively expensive technologies. Although CMOS is certainly not the dominating semiconductor for photonics, its widespread use, favourable cost and robustness present an attractive potential if it could find application in the microdisplay environment. Advances in improving the quantum efficiency of avalanche electroluminescence and the favourable spectral characteristics of light generated through the said mechanism may afford CMOS the possibility to be used as a display technology. This work shows that it is possible to integrate a fully functional display in a completely standard CMOS technology mainly geared towards digital design while using light sources completely compatible with the process and without any post processing required.

Design and manufacture of quantum-confined punch-through SOI light sources

To investigate quantum-confinement (QC) effects on silicon (Si) light source electroluminescence (EL) properties like external power efficiency (EPE) and spectral emission, nanometer-scale Si finger junctions were manufactured in a fully customized silicon-on-insulator (SOI) production technology. All spectrometer-measured thickness-confined SOI light sources displayed pronounced optical power for 600 nm < λ < 1 μm. The best thickness-confined SOI light source emitted about 24 times more optical power around λ = 844 nm and exhibited an EPE improvement factor of about 21 compared to a 350 nm bulk-CMOS avalanche reference light-source operating at the same current. Internal quantum efficiency (IQE) enhancements factors of about 3.5 were attributed to carrier-confinement. The punch-through (PT) technique, which introduced breakdown voltages as low as 6 V, increased the SOI light source EPE by about a factor 2.5. It was estimated that geometric-optical improvement techniques that include Si finger surface profiling, raised the SOI light source external quantum efficiency (EQE) by about a factor 1.7. It was further shown that the SOI Si handle could be used to reflect up to about 40 % of light that would otherwise be lost due to downward radiation back up, thereby increasing the EPE of SOI light sources.