Petrus J. Venter
University of Pretoria
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Publication
Featured researches published by Petrus J. Venter.
IEEE Journal of Quantum Electronics | 2013
Monuko du Plessis; Petrus J. Venter; Enrico Bellotti
The emission spectra of avalanching n+p junctions manufactured in a standard 350-nm CMOS technology with no process modifications are measured over a broad spectral range and at different current levels. In contrast to the narrow-band forward-biased pn junction emission spectrum, the reverse biased avalanching emission spectrum extends from the ultraviolet 350 nm (3.6 eV) to the near infrared 1.7 μm(0.7 eV), covering the visual range. The photon emission energy spectrum is compared to the hot electron energy distribution within the conduction band, as determined from a full band Monte Carlo simulation. This allows the identification of phonon assisted indirect intraband (c-c) hot electron transitions as the dominant physical light emission processes within the high electric field avalanching junction. Device simulations are utilized to identify the device drift region as the source of the near infrared emissions.
Optical Engineering | 2012
Petrus J. Venter; Monuko du Plessis; Alfons W. Bogalecki; Marius E. Goosen; Pieter Rademeyer
Microdisplay technologies for near-to-eye applications mostly use a complementary metal-oxide semiconductor (CMOS) processing chip as backplane for pixel addressing, with extensive post-processing on top of the CMOS chip to deposit organic LED or liquid crystal layers. Here, we examine the possibility of integrating emissive microdisplays within the CMOS chip, with absolutely no post processing needed. This will dramatically reduce the manufacturing cost of microdisplays and may lead to new microdisplay applications. Visible electroluminescence is achieved by biasing pn junctions into avalanche breakdown mode. The most appropriate CMOS pn junction is selected and innovative tech- niques are applied to increase the light extraction efficiency from the CMOS chip using the metal layers of the CMOS process. An 8 × 64 dot matrix microdisplay was designed and manufactured in a 0.35-μm CMOS technology. The experimental results show that a luminance level of 20 cd∕m 2 can be reached, which is an adequate luminance value in order to comfortably read data being displayed in relatively dark environ- ments. The electrical power dissipation per pixel being activated is 0.9 mW∕pixel. It is also shown that the pixels can be switched at a rate faster than 350 MHz.
IEEE\/OSA Journal of Display Technology | 2014
Petrus J. Venter; Monuko du Plessis
Visible light from silicon junctions under avalanche breakdown can be used to create microdisplay systems with integrated light sources. Junctions available in standard CMOS usually breaks down at much larger voltages than the typical operating voltage for integrated circuitry. It is possible to reduce the operating voltage of by making use of techniques which changes the electric field profile in light sources based on hot carrier electroluminescence such as electric field reach through between two highly doped implant regions. This work successfully demonstrates the possibility of tailoring the operating voltage and quantifying the optical performance in an integrated microdisplay consisting of a 128 by 96 pixel array based on light sources in standard CMOS. Based on the approach followed it becomes possible to integrate light sources in such a manner that it can coexist and interact with other on-chip analog and digital circuitry. The requirements for architectural features of a microdisplay in standard CMOS is discussed and it is shown to be possible to create large scale integrated circuits containing integrated light sources in standard CMOS without the need for postprocessing or additional back end modifications.
Proceedings of SPIE | 2011
Marius E. Goosen; Petrus J. Venter; Monuko du Plessis; Ilse J. Nell; Alfons W. Bogalecki; Pieter Rademeyer
The idea of moving CMOS into the mainstream optical domain remains an attractive one. In this paper we discuss our recent advances towards a complete silicon optical communication solution. We prove that transmission of baseband data at multiples of megabits per second rates are possible using improved silicon light sources in a completely native standard CMOS process with no post processing. The CMOS die is aligned to a fiber end and the light sources are directly modulated. An optical signal is generated and transmitted to a silicon Avalanche Photodiode (APD) module, received and recovered. Signal detectability is proven through eye diagram measurements. The results show an improvement of more than tenfold over our previous results, also demonstrating the fastest optical communication from standard CMOS light sources. This paper presents an all silicon optical data link capable of 2 Mb/s at a bit error rate of 10-10, or alternatively 1 Mb/s at a bit error rate of 10-14. As the devices are not operating at their intrinsic switching speed limit, we believe that even higher transmission rates are possible with complete integration of all components in CMOS.
Proceedings of SPIE | 2013
Petrus J. Venter; Monuko du Plessis; Alfons W. Bogalecki; Christo Janse van Rensburg
Silicon-on-insulator (SOI) is becoming an important technology platform in nanometer scale CMOS integrated circuits. The platform offers a number of distinct advantages over bulk CMOS for materializing silicon light sources based on hot carrier luminescence. This work describes the design of nanoscale silicon structures for enhanced light emission with improved power efficiency, which allows the use of SOI light sources in short-haul optical communication links with extended possibilities for other applications. It has been shown experimentally that reducing the dimensions of the active material results in an improvement of electroluminescent power emitted from forward-biased pn-junctions. Previously published results show a similar trend for light sources based on hot carrier luminescence. Building on our previous work in SOI light sources, multiple fingerlike junctions are manufactured in an arrayed fashion for coupling into large diameter core optical fibers for CMOS optical communications up to a few hundred meters. The manufacturing methodology and associated challenges are discussed for the scaling down of device dimensions, and difficulties in realizing the structures are investigated. The optical power characteristics are discussed as well as the spectral nature of emission along with the advantages and disadvantages thereof. This work compares different architectures of light sources that were implemented where a comparison is drawn between previous SOI devices as well as bulk CMOS. We believe the improved SOI light sources are fully compatible with modern CMOS technologies based on SOI and may provide such technologies with a much needed light source as part of the circuit designer’s toolkit.
Proceedings of SPIE, the International Society for Optical Engineering | 2010
Monuko du Plessis; Petrus J. Venter; Alfons W. Bogalecki
For CMOS silicon-based light emitting devices to become practical the external power efficiency must be increased. In this paper a reach-through technique is described whereby the external power efficiency can be increased as a result of three phenomena: i) increase in internal quantum efficiency, ii) increase in light extraction efficiency, and iii) lower operating voltage. The three techniques are discussed and the factor 7 improvement in external power efficiency will be described in terms of the electrical characteristics as well as the external radiation patterns.
Proceedings of SPIE, the International Society for Optical Engineering | 2010
Petrus J. Venter; Monuko du Plessis
A key requirement for the success of future microphotonic devices will be the ability to integrate such devices into current mainstream semiconductor technologies. The ability to create silicon-based light sources in a standard CMOS process is therefore very appealing. It is known that avalanche silicon LED efficiency can be increased using reach- and punch-through mechanisms. This paper reveals a technique for improving the operational performance of a silicon light source by increasing the external quantum efficiency and relaxing the separation requirements for the light source operating under the mentioned reach- or punch-through mechanisms in a standard unmodified local oxidation of silicon (LOCOS) CMOS process.
international conference on microelectronics | 2010
Alfons W. Bogalecki; Monuko du Plessis; Petrus J. Venter; Ilse J. Nell; Marius E. Goosen
The directionality and external optical power of CMOS light sources was improved a factor 3.9 by implementing integrated light reflectors in an unmodified CMOS process. Implementing such reflectors successfully demonstrated a CMOS micro-display and a 350 MHz Si optical communication link.
international conference on microelectronics | 2010
Petrus J. Venter; Monuko du Plessis; Ilse J. Nell; Marius E. Goosen; Alfons W. Bogalecki
Avalanche electroluminescence offers the opportunity for standard CMOS devices to be used as light emitters. Although inefficient, avalanche breakdown is inherently a fast process and potentially offers benefits in terms of speed when compared to emission based on forward biased junctions. Furthermore, the wide spectral characteristics of avalanche electroluminescence in the visible range also allows for some interesting applications. The main obstacle suppressing the use of these silicon light emitters in mainstream applications is inefficient radiative recombination. A number of techniques are known to improve quantum efficiency, one of which is operating the devices in punch through mode. This work focuses on improved results obtained from punch through devices, manipulation of the oxide above the radiative action and interesting results pertaining to the radiation pattern and the effects of LOCOS structures on the emission shape. This information could potentially benefit optical coupling to the light sources.
Proceedings of SPIE | 2011
Petrus J. Venter; Alfons W. Bogalecki; Monuko du Plessis; Marius E. Goosen; Ilse J. Nell; Pieter Rademeyer
Display technologies always seem to find a wide range of interesting applications. As devices develop towards miniaturization, niche applications for small displays may emerge. While OLEDs and LCDs dominate the market for small displays, they have some shortcomings as relatively expensive technologies. Although CMOS is certainly not the dominating semiconductor for photonics, its widespread use, favourable cost and robustness present an attractive potential if it could find application in the microdisplay environment. Advances in improving the quantum efficiency of avalanche electroluminescence and the favourable spectral characteristics of light generated through the said mechanism may afford CMOS the possibility to be used as a display technology. This work shows that it is possible to integrate a fully functional display in a completely standard CMOS technology mainly geared towards digital design while using light sources completely compatible with the process and without any post processing required.