Monuko du Plessis

Increased efficiency of silicon light-emitting diodes in a standard 1.2-μm silicon complementary metal oxide semiconductor technology

Scaled versions of a variety of silicon light-emitting diode elements (Si LEDs) have been realized using a standard 1.2-µm, doublepolysilicon, double-metal, n-well CMOS fabrication process. The devices operated with a n+p junction biased in the avalanche breakdown mode and were realized by using standard features of the ORBIT FORESIGHT design rules. The elements emit optical radiation in a broad band in the 450- to 850-nm range. An emitted intensity (radiant exitance) of up to 7.1 µW/cm2 (or about 8 nW per 60-µm-diam chip area) has been obtained with 5 mA of current at an operating voltage of 18.5 V. Excellent uniformity in emission intensity of better than 1% variation was obtained over areas as large as 100x500 µm. A best power conversion efficiency of 8.7x 10-8 and a quantum efficiency of 7.8x 10-7 were measured. All of these values are about one order of magnitude better than previously reported values for Si LED avalanche devices. Coupling between the elements as well as electro-optical coupling between an element and an optical fiber was realized.

Planar light-emitting electro-optical interfaces in standard silicon complementary metal oxide semiconductor integrated circuitry

Lukas Willem SnymanTechnikon PretoriaSchool of Electrical EngineeringDepartment of Electronic EngineeringPrivate Bag X6800001 Pretoria, South AfricaandFrench South African Technical Institute inElectronicsE-mail: lsnyman@techpta.ac.zaHerzl AharoniBen-Gurion University of the NegevDepartment of Electricaland Computer EngineeringBeer-Sheva, 84105IsraelMonuko du PlessisJan F. K. MaraisDeon Van NiekerkUniversity of PretoriaCarl and Emily Fuchs Institute forMicroelectronics (CEFIM)Department of Electrical, Electronicand Computer Engineering0002 Pretoria, South AfricaAlice BiberCentre Suisse d’Electronique et deMicrotechniqueNeuchatel, SwitzerlandAbstract. A number of planar silicon light-emitting devices are designedand realized in standard 1.2 and 2-mm complementary metal oxide semi-conductor (CMOS) integrated circuitry. The devices yield optical powerintensities of up to 0.2 mW/cm

A silicon transconductance light emitting device (TRANSLED)

A novel multi-terminal silicon light emitting device (TRANSLED) is described where both the light intensity and spatial light pattern of the device are controlled by an insulated MOS gate voltage. This presents a major advantage over two terminals Si-LEDs, which require direct modulation of the relatively high avalanche current. It is found that, depending on the bias conditions, the light intensity is either a linear or a quadratic function of the applied gate voltage. The nonlinear relationship facilitates new applications such as the mixing of electrical input signals and modulating the optical output signal, which cannot readily be achieved with two terminal Si-LEDs, since they exhibit a linear relationship between diode avalanche current and light intensity. Furthermore, the control gate voltage can also modulate the emission pattern of the light emitting regions, for example, changing the TRANSLED from an optical line source to two point sources.

A dependency of quantum efficiency of silicon CMOS n/sup +/pp/sup +/ LEDs on current density

A dependency of quantum efficiency of nn/sup +/pp/sup +/ silicon complementary metal-oxide-semiconductor integrated light-emitting devices on the current density through the active device areas is demonstrated. It was observed that an increase in current density from 1.6/spl times/10/sup +2/ to 2.2/spl times/10/sup +4/ A/spl middot/cm/sup -2/ through the active regions of silicon n/sup +/pp/sup +/ light-emitting diodes results in an increase in the external quantum efficiency from 1.6/spl times/10/sup -7/ to 5.8/spl times/10/sup -6/ (approximately two orders of magnitude). The light intensity correspondingly increase from 10/sup -6/ to 10/sup -1/ W/spl middot/cm/sup -2//spl middot/mA (approximately five orders of magnitude). In our study, the highest efficiency device operate in the p-n junction reverse bias avalanche mode and utilize current density increase by means of vertical and lateral electrical field confinement at a wedge-shaped n/sup +/ tip placed in a region of lower doping density and opposite highly conductive p/sup +/ regions.

Injection-Avalanche-Based n+pn Silicon Complementary Metal–Oxide–Semiconductor Light-Emitting Device (450–750 nm) with 2-Order-of-Magnitude Increase in Light Emission Intensity

In this paper, we report on an increase in emission intensity of up to 10 nW/mm 2 that has been realized with a new novel two junction, diagonal avalanche control, and minority carrier injection silicon complementary metal–oxide–semiconductor (CMOS) light emitting device (LED). The device utilizes a four-terminal configuration with two embedded shallow n þ p junctions in a p substrate. One junction is kept in deep-avalanche and light-emitting mode, while the other junction is forward biased and minority carrier electrons are injected into the avalanching junction. The device has been realized using standard 0.35 mm CMOS design rules and fabrication technology and operates at 9 V in the current range 0.1– 3 mA. The optical output power is about one order of magnitude higher for previous single-junction n þ p light-emitting devices while the emission intensity is about two orders of magnitude higher than for single-junction devices. The optical output is about three orders of magnitude higher than the low-frequency detectivity limit of silicon p–i–n detectors of comparable dimensions. The realized characteristics may enable diverse optoelectronic applications in standard-CMOS-silicon-technology-based integrated circuitry. [DOI: 10.1143/JJAP.46.2474]

Characterization of breakdown phenomena in light emitting silicon n+p diodes

A 10 kV, 10−10 A focused electron beam was used to map localized charge multiplication, and localized avalanche breakdown sites in the depletion region of light emitting silicon n+p junctions. It was observed that the localized avalanche breakdown sites led to the formation of large densities of extremely small current filaments in the junction. The dimension of each filament was well into the submicron range (100–150 nm in diameter) and the densities of the filaments varied laterally across the junction between 4×108 and 4×1010 cm−2. Accurate and high resolution maps of the current filaments could be obtained. The formation of the individual current filaments (microavalanche sites) at a submicron level are apparently related to localized defect and materials effects. The distribution of the current filaments at the micron level relates to the strength and distribution of electric field at the junction interface. Direct evidence has been obtained that the nonuniformities in the light emission patterns on ...

Spectral Characteristics of Hot Electron Electroluminescence in Silicon Avalanching Junctions

The emission spectra of avalanching n+p junctions manufactured in a standard 350-nm CMOS technology with no process modifications are measured over a broad spectral range and at different current levels. In contrast to the narrow-band forward-biased pn junction emission spectrum, the reverse biased avalanching emission spectrum extends from the ultraviolet 350 nm (3.6 eV) to the near infrared 1.7 μm(0.7 eV), covering the visual range. The photon emission energy spectrum is compared to the hot electron energy distribution within the conduction band, as determined from a full band Monte Carlo simulation. This allows the identification of phonon assisted indirect intraband (c-c) hot electron transitions as the dominant physical light emission processes within the high electric field avalanching junction. Device simulations are utilized to identify the device drift region as the source of the near infrared emissions.

Optical sources, integrated optical detectors and optical waveguides in standard silicon CMOS integrated circuitry

A series of light emitting devices were designed and realized with a standard 2 micron CMOS technology, 1.2 micron CMOS technology and 0.8 micron Bi-CMOS integrated circuit fabrication technology. The devices operated in the reverse breakdown avalanche mode, at voltage levels of 8 - 20 V and in the current range 80 (mu) A - 10 mA. The devices emit visible light in the 450 - 750 nm wavelength region at intensity levels of up to 1 nWmicrometers -2 (10 mW.cm-2). A series of optimized optical detectors were developed using the same technologies in order to detect lateral and glancing incidence visible and infrared radiation optimally. A series of waveguiding structures of up to 100 micron in length were designed and realized with CMOS technologies by utilizing the field oxide, the inter- metallic oxides and the aluminum metal layers as construction elements. Signal levels ranging from 60 nA to 1 micro-amperes could be detected at the detectors of waveguiding structures of up to 100 micron in length. Finally, a complete optoelectronic integrated circuit was designed and simulated with 0.8 micron Bi-CMOS technology with some of the developed light sources, detectors, waveguiding structures and added driving and amplification circuitry. In particular a very powerful high gain wide- bandwidth MOSFET signal amplifiers was developed that could be successfully integrated in the optoelectronic integrated circuit. The developed technologies show potential for application of optoelectronic circuits in next generation silicon CMOS integrated circuits.

Increasing the efficiency of p+np+ injection-avalanche Si CMOS LEDs (450nm - 750nm) by means of depletion layer profiling and reach-through techniques

Modeling of p+np+ CMOS Si LED structures show that by utilizing a short linear increasing E-field in the p+n reverse biased junction with a gradient of approximately 5 × 105 V.cm-1. μm-1, and facing an injecting p+n junction, has the potential to enhance photonic emissions in the 2.2 and 2.8 eV (450-750nm ) regime. Latest new designs utilize reach-through techniques in p+np+ avalanche-injection control structures and p+np+ poly-Si gated structures and show positive realizations of this model. Areas in the devices show marked increases in emission efficiency of factors of up to 50 - 100 as compared to previous realizations utilizing no reach-through and injection techniques. The current devices operated in the 6-8V, 1uA - 2mA regime and emit at levels of up to ~10nW /μm2. The developed devices have been realized using standard 0.35 μm CMOS design rules and fabrication technology, and have particular technological significance for future all-silicon CMOS opto-elctronic circuits and systems. The current emission levels are about three orders higher than the low frequency detectability limit of CMOS p-i-n detectors of corresponding area.

The spatial distribution of light from silicon LEDs

Abstract Well-defined light patterns emitted from circular guard-ring avalanche silicon photodioles made on CZ substrates provide an experimental proof that the reverse current does not flow all over the junction area. This fact should be taken into account in calculations of current densities in future device design considerations. The light patterns originate from zones of crystal striations. These striations, which are usually considered to be a negative factor, are utilized here to control the overall light-emission intensity. It is shown that the light-patter dimensions and intensity are current controlled. The percentage of light area coverage, the overall emitted light intensity and the average reverse-current density are interrelated and determined as a function of the operating current. Four distinct regions of operation are identified. It is shown that the emitted light intensity is directly proportional to the area of light emission in three of the regions (low, medium and high currents) even at high junction temperatures. The results are application oriented with regard to the design of future silicon light-emitting diodes (LEDs).