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Featured researches published by Alvaro Padilla.


Journal of Vacuum Science & Technology. B. Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena | 2010

Phase change memory technology

Geoffrey W. Burr; Matthew J. Breitwisch; Michele M. Franceschini; Davide Garetto; Kailash Gopalakrishnan; Bryan L. Jackson; B. N. Kurdi; Chung H. Lam; Luis A. Lastras; Alvaro Padilla; Bipin Rajendran; Simone Raoux; R. S. Shenoy

The authors survey the current state of phase change memory (PCM), a nonvolatile solid-state memory technology built around the large electrical contrast between the highly resistive amorphous and highly conductive crystalline states in so-called phase change materials. PCM technology has made rapid progress in a short time, having passed older technologies in terms of both sophisticated demonstrations of scaling to small device dimensions, as well as integrated large-array demonstrators with impressive retention, endurance, performance, and yield characteristics. They introduce the physics behind PCM technology, assess how its characteristics match up with various potential applications across the memory-storage hierarchy, and discuss its strengths including scalability and rapid switching speed. Challenges for the technology are addressed, including the design of PCM cells for low reset current, the need to control device-to-device variability, and undesirable changes in the phase change material that c...


Journal of Vacuum Science & Technology. B. Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena | 2014

Access devices for 3D crosspoint memorya)

Geoffrey W. Burr; R. S. Shenoy; Kumar Virwani; Pritish Narayanan; Alvaro Padilla; B. N. Kurdi; Hyunsang Hwang

The emergence of new nonvolatile memory (NVM) technologies—such as phase change memory, resistive, and spin-torque-transfer magnetic RAM—has been motivated by exciting applications such as storage class memory, embedded nonvolatile memory, enhanced solid-state disks, and neuromorphic computing. Many of these applications call for such NVM devices to be packed densely in vast “crosspoint” arrays offering many gigabytes if not terabytes of solid-state storage. In such arrays, access to any small subset of the array for accurate reading or low-power writing requires a strong nonlinearity in the IV characteristics, so that the currents passing through the selecteddevices greatly exceed the residual leakage through the nonselecteddevices. This nonlinearity can either be included explicitly, by adding a discrete access device at each crosspoint, or implicitly with an NVM device which also exhibits a highly nonlinear IV characteristic. This article reviews progress made toward implementing such access device functionality, focusing on the need to stack such crosspoint arrays vertically above the surface of a silicon wafer for increased effective areal density. The authors start with a brief overview of circuit-level considerations for crosspoint memory arrays, and discuss the role of the access device in minimizing leakage through the many nonselected cells, while delivering the right voltages and currents to the selected cell. The authors then summarize the criteria that an access device must fulfill in order to enable crosspoint memory. The authors review current research on various discrete access device options, ranging from conventional silicon-based semiconductor devices, to oxide semiconductors, threshold switch devices, oxide tunnel barriers, and devices based on mixed-ionic-electronic-conduction. Finally, the authors discuss various approaches for self-selected nonvolatile memories based on Resistive RAM.


ACM Journal on Emerging Technologies in Computing Systems | 2013

Nanoscale electronic synapses using phase change devices

Bryan L. Jackson; Bipin Rajendran; Gregory S. Corrado; Matthew J. Breitwisch; Geoffrey W. Burr; Roger W. Cheek; Kailash Gopalakrishnan; Simone Raoux; C. T. Rettner; Alvaro Padilla; Alejandro G. Schrott; R. S. Shenoy; B. N. Kurdi; Chung Hon Lam; Dharmendra S. Modha

The memory capacity, computational power, communication bandwidth, energy consumption, and physical size of the brain all tend to scale with the number of synapses, which outnumber neurons by a factor of 10,000. Although progress in cortical simulations using modern digital computers has been rapid, the essential disparity between the classical von Neumann computer architecture and the computational fabric of the nervous system makes large-scale simulations expensive, power hungry, and time consuming. Over the last three decades, CMOS-based neuromorphic implementations of “electronic cortex” have emerged as an energy efficient alternative for modeling neuronal behavior. However, the key ingredient for electronic implementation of any self-learning system—programmable, plastic Hebbian synapses scalable to biological densities—has remained elusive. We demonstrate the viability of implementing such electronic synapses using nanoscale phase change devices. We introduce novel programming schemes for modulation of device conductance to closely mimic the phenomenon of Spike Timing Dependent Plasticity (STDP) observed biologically, and verify through simulations that such plastic phase change devices should support simple correlative learning in networks of spiking neurons. Our devices, when arranged in a crossbar array architecture, could enable the development of synaptronic systems that approach the density (∼1011 synapses per sq cm) and energy efficiency (consuming ∼1pJ per synaptic programming event) of the human brain.


Journal of Applied Physics | 2012

Observation and modeling of polycrystalline grain formation in Ge2Sb2Te5

Geoffrey W. Burr; Pierre Tchoulfian; Teya Topuria; Clemens Nyffeler; Kumar Virwani; Alvaro Padilla; Robert M. Shelby; Mona Eskandari; Bryan L. Jackson; B. Lee

The relationship between the polycrystalline nature of phase change materials (such as Ge2Sb2Te5) and the intermediate resistance states of phase change memory (PCM) devices has not been widely studied. A full understanding of such states will require knowledge of how polycrystalline grains form, how they interact with each other at various temperatures, and how the differing electrical (and thermal) characteristics within the grains and at their boundaries combine through percolation to produce the externally observed electrical (and thermal) characteristics of a PCM device. We address the first of these tasks (and introduce a vehicle for the second) by studying the formation of fcc polycrystalline grains from the as-deposited amorphous state in undoped Ge2Sb2Te5. We perform ex situ transmission electron microscopy membrane experiments and then match these observations against numerical simulation. Ramped-anneal experiments show that the temperature ramp-rate strongly influences the median grain size. By...


international electron devices meeting | 2012

Sub-30nm scaling and high-speed operation of fully-confined Access-Devices for 3D crosspoint memory based on mixed-ionic-electronic-conduction (MIEC) materials

Kumar Virwani; Geoffrey W. Burr; R. S. Shenoy; C. T. Rettner; Alvaro Padilla; Teya Topuria; Philip M. Rice; G. Ho; R. S. King; K. Nguyen; A. N. Bowers; M. Jurich; M. BrightSky; Eric A. Joseph; A. J. Kellock; N. Arellano; B. N. Kurdi; Kailash Gopalakrishnan

BEOL-friendly Access Devices (AD) based on Cu-containing MIEC materials [1-3] are shown to scale to the <;30nm CDs and <;12nm thicknesses found in advanced technology nodes. Switching speeds at the high (>100uA) currents of NVM writes can reach 15ns; NVM reads at typical (~5uA) current levels can be ≪1usec.


symposium on vlsi technology | 2012

Large-scale (512kbit) integration of multilayer-ready access-devices based on mixed-ionic-electronic-conduction (MIEC) at 100% yield

Geoffrey W. Burr; Kumar Virwani; R. S. Shenoy; Alvaro Padilla; M. BrightSky; Eric A. Joseph; M. Lofaro; A. J. Kellock; R. S. King; K. Nguyen; A. N. Bowers; M. Jurich; C. T. Rettner; Bryan L. Jackson; Donald S. Bethune; Robert M. Shelby; Teya Topuria; N. Arellano; Philip M. Rice; B. N. Kurdi; Kailash Gopalakrishnan

BEOL-friendly Access Devices (AD) based on Cu-containing MIEC materials [1-4] are integrated in large (512 × 1024) arrays at 100% yield, and are successfully co-integrated together with Phase Change Memory (PCM). Numerous desirable attributes are demonstrated: the large currents (>;200μA) needed for PCM, the bipolar operation required for high-performance RRAM, the single-target sputter deposition essential for high-volume manufacturing, and the ultra-low leakage ( 10 pA) and high voltage margin (1.5V) needed to enable large crosspoint arrays.


Journal of Applied Physics | 2011

Voltage polarity effects in Ge2Sb2Te5-based phase change memory devices

Alvaro Padilla; Geoffrey W. Burr; C. T. Rettner; Teya Topuria; Philip M. Rice; Bryan L. Jackson; Kumar Virwani; A. J. Kellock; Diego G. Dupouy; Anthony Debunne; Robert M. Shelby; Kailash Gopalakrishnan; R. S. Shenoy; B. N. Kurdi

We assess voltage polarity effects in phase-change memory (PCM) devices that contain Ge2Sb2Te5 (GST) as the active material through the study of vertically asymmetric pore-cell and laterally symmetric bridge-cell structures. We show that bias polarity can greatly accelerate device failure in such GST-based PCM devices and, through extensive transmission electron microscopy-based failure analysis, trace these effects to a two-stage elemental segregation process. Segregation is initially driven by bias across the molten region of the cell and is then greatly enhanced during the crystallization process at lower temperatures. These results have implications for the design of pulses and PCM cells for maximum endurance, the use of reverse polarity for extending endurance, the requirements for uni- or bi-polar access devices, the need for materials science on active rather than initial stoichiometries, and the need to evaluate new PCM materials under both bias polarities.


international electron devices meeting | 2010

Voltage polarity effects in GST-based phase change memory: Physical origins and implications

Alvaro Padilla; Geoffrey W. Burr; Kumar Virwani; Anthony Debunne; C. T. Rettner; Teya Topuria; Philip M. Rice; Bryan L. Jackson; Diego G. Dupouy; A. J. Kellock; Robert M. Shelby; Kailash Gopalakrishnan; R. S. Shenoy; B. N. Kurdi

We show that bias polarity can greatly accelerate device failure in GST- based (GeSbTe) PCM devices, and trace this effect to elemental segregation, initially driven by bias across the melt but then enhanced during the crystallization process. Implications include device, pulse, and materials design for high endurance.


Semiconductor Science and Technology | 2014

MIEC (mixed-ionic-electronic-conduction)-based access devices for non-volatile crossbar memory arrays

R. S. Shenoy; Geoffrey W. Burr; Kumar Virwani; Bryan L. Jackson; Alvaro Padilla; Pritish Narayanan; C. T. Rettner; Robert M. Shelby; Donald S. Bethune; Karthik V. Raman; M. BrightSky; Eric A. Joseph; Philip M. Rice; Teya Topuria; A. J. Kellock; B. N. Kurdi; Kailash Gopalakrishnan

Several attractive applications call for the organization of memristive devices (or other resistive non-volatile memory (NVM)) into large, densely-packed crossbar arrays. While resistive-NVM devices frequently possess some degree of inherent nonlinearity (typically 3?30? contrast), the operation of large ( 1000?1000 device) arrays at low power tends to require quite large ( 1e7) ON-to-OFF ratios (between the currents passed at high and at low voltages). One path to such large nonlinearities is the inclusion of a distinct access device (AD) together with each of the state-bearing resistive-NVM elements. While such an AD need not store data, its list of requirements is almost as challenging as the specifications demanded of the memory device. Several candidate ADs have been proposed, but obtaining high performance without requiring single-crystal silicon and/or the high processing temperatures of the front-end-of-the-line?which would eliminate any opportunity for 3D stacking?has been difficult.We review our work at IBM Research?Almaden on high-performance ADs based on Cu-containing mixed-ionic-electronic conduction (MIEC) materials [1?7]. These devices require only the low processing temperatures of the back-end-of-the-line, making them highly suitable for implementing multi-layer cross-bar arrays. MIEC-based ADs offer large ON/OFF ratios (), a significant voltage margin (over which current nA), and ultra-low leakage ( 10 pA), while also offering the high current densities needed for phase-change memory and the fully bipolar operation needed for high-performance RRAM. Scalability to critical lateral dimensions 30 nm and thicknesses 15 nm, tight distributions and 100% yield in large (512 kBit) arrays, long-term stability of the ultra-low leakage states, and sub-50 ns turn-ON times have all been demonstrated. Numerical modeling of these MIEC-based ADs shows that their operation depends on mediated hole conduction. Circuit simulations reveal that while scaled MIEC devices are suitable for large crossbar arrays of resistive-NVM devices with low ( 1.2 V) switching voltages, stacking two MIEC devices can support large crossbar arrays for switching voltages up to 2.5 V.


Journal of The Electrochemical Society | 2011

Evidence of Crystallization–Induced Segregation in the Phase Change Material Te-Rich GST

Anthony Debunne; Kumar Virwani; Alvaro Padilla; Geoffrey W. Burr; A. J. Kellock; Vaughn R. Deline; Robert M. Shelby; Bryan L. Jackson

When the phase change material Ge2Sb2Te5 melts during the RESET switching of a phase change memory (PCM) device, it is known that electromigration (elemental segregation under electric field or current) can cause the region near the positively-biased electrode to become rich in Tellurium. We show that the laser-induced crystallization of deposited films of similarly Telluriumrich GeSbTe (GST) material is 1000 slower than the crystallization of conventional Ge2Sb2Te5 material, and that this material can readily flow and create voids at temperatures as low as 350 C. AFM and Auger analysis of Te-rich GST films reveals significant thermal-induced motion and elemental segregation, occurring in the absence of an electrical field and at similarly low temperatures. This phenomenon, termed crystallization-induced segregation, occurs when material rearrangement within the poorly-crystallizing, under–cooled–liquid Te-rich GST matrix forms a local stoichiometry which is capable of much more rapid crystallization. The process of crystallization itself then reinforces this stoichiometry, at the expense of the elements not needed, with a growth–rate limited by material diffusion. This crystallization-induced segregation — which can readily occur in GSTbased phase change memory (PCM) devices, especially after the onset of electromigration — is an important additional component to understanding both bias-polarity-based phenomena and endurance failure in GST–based PCM devices. VC 2011 The Electrochemical Society. [DOI: 10.1149/1.3614508] All rights reserved.

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