Network


Latest external collaboration on country level. Dive into details by clicking on the dots.

Hotspot


Dive into the research topics where Alvin J. Joseph is active.

Publication


Featured researches published by Alvin J. Joseph.


IEEE Transactions on Electron Devices | 2001

Current status and future trends of SiGe BiCMOS technology

David L. Harame; David C. Ahlgren; Douglas D. Coolbaugh; James S. Dunn; G. Freeman; John D. Gillis; Robert A. Groves; Gregory N. Hendersen; Robb Allen Johnson; Alvin J. Joseph; Seshardi Subbanna; Alan M. Victor; Kimball M. Watson; Charles S. Webster; P.J. Zampardi

The silicon germanium (SiGe) heterojunction bipolar transistor (HBT) marketplace covers a wide range of products and product requirements, particularly when combined with CMOS in a BiCMOS technology. A new base integration approach is presented which decouples the structural and thermal features of the HBT from the CMOS. The trend is to use this approach for future SiGe technologies for easier migration to advanced CMOS technology generations. Lateral and vertical scaling are used to achieve smaller and faster SiGe HBT devices with greatly increased current densities. Improving both the f/sub T/ and f/sub MAX/ will be a significant challenge as the collector and base dopant concentrations are increased. The increasing current densities of the SiGe HBT will put more emphasis on interconnects as a key factor in limiting transistor layout. Capacitors and inductors are two very important passives that must improve with each generation. The trend toward increasing capacitance in polysilicon-insulator-silicon (MOSCAP), polysilicon-insulator-polysilicon (Poly-Poly), and metal-insulator-metal (MIM) capacitors is discussed. The trend in VLSI interconnections toward thinner interlevel dielectrics and metallization layers is counter to the requirements of high Q inductors, potentially requiring a custom last metallization layer.


bipolar/bicmos circuits and technology meeting | 2001

A 0.18 /spl mu/m BiCMOS technology featuring 120/100 GHz (f/sub T//f/sub max/) HBT and ASIC-compatible CMOS using copper interconnect

Alvin J. Joseph; D. Coolbaugh; Michael J. Zierak; R. Wuthrich; Peter J. Geiss; Zhong-Xiang He; Xuefeng Liu; Bradley A. Orner; Jeffrey B. Johnson; G. Freeman; David C. Ahlgren; Basanth Jagannathan; Louis D. Lanzerotti; John C. Malinowski; Huajie Chen; J. Chu; Peter B. Gray; Robb Allen Johnson; James S. Dunn; Seshadri Subbanna; Kathryn T. Schonenberg; David L. Harame; R. Groves; K. Watson; D. Jadus; M. Meghelli; A. Rylyakov

A BiCMOS technology is presented that integrates a high performance NPN (f/sub T/=120 GHz and f/sub max/=100 GHz), ASIC compatible 0.11 /spl mu/m L/sub eff/ CMOS, and a full suite of passive elements. Significant HBT performance enhancement compared to previously published results has been achieved through further collector and base profile optimization guided by process and device simulations. Base transit time reduction was achieved by simultaneously increasing the Ge ramp and by limiting the base diffusion with the addition of carbon doping to SiGe epitaxial base. This paper describes IBMs next generation SiGe BiCMOS production technology targeted at the communications market.


international microwave symposium | 2005

Reconfigurable RFICs in Si-based technologies for a compact intelligent RF front-end

R. Mukhopadhyay; Y. Park; Padmanava Sen; N. Srirattana; Jongsoo Lee; Chang-Ho Lee; S. Nuttinck; Alvin J. Joseph; John D. Cressler; Joy Laskar

This paper presents reconfigurable RF integrated circuits (ICs) for a compact implementation of an intelligent RF front-end for multiband and multistandard applications. Reconfigurability has been addressed at each level starting from the basic elements to the RF blocks and the overall front-end architecture. An active resistor tunable from 400 to 1600 /spl Omega/ up to 10 GHz has been designed and an equivalent model has been extracted. A fully tunable active inductor using a tunable feedback resistor has been proposed that provides inductances between 0.1-15 nH with Q>50 in the C-band. To demonstrate reconfigurability at the block level, voltage-controlled oscillators with very wide tuning ranges have been implemented in the C-band using the proposed active inductor, as well as using a switched-spiral resonator with capacitive tuning. The ICs have been implemented using 0.18-/spl mu/m Si-CMOS and 0.18-/spl mu/m SiGe-BiCMOS technologies.


IEEE Transactions on Electron Devices | 2002

A new "mixed-mode" reliability degradation mechanism in advanced Si and SiGe bipolar transistors

Gang Zhang; John D. Cressler; Guofu Niu; Alvin J. Joseph

A new mixed-mode base current degradation mechanism is identified in bipolar transistors for the first time, which, at room temperature, induces a large I/sub B/ leakage current only after simultaneous application of both high J/sub C/ and high V/sub CB/. This new mechanism differs fundamentally from well-known I/sub B/ degradation mechanisms such as the reverse EB voltage stress, high forward current stress and damage due to ionizing radiation. Extensive measurements and two-dimensional (2-D) simulations have been used to help understand the device physics associated with this new degradation mechanism.


Ibm Journal of Research and Development | 2003

Foundation of rf CMOS and SiGe BiCMOS technologies

James S. Dunn; David C. Ahlgren; Douglas D. Coolbaugh; Natalie B. Feilchenfeld; G. Freeman; David R. Greenberg; Robert A. Groves; Fernando Guarin; Youssef Hammad; Alvin J. Joseph; Louis D. Lanzerotti; Stephen A. St. Onge; Bradley A. Orner; Jae Sung Rieh; Kenneth J. Stein; Steven H. Voldman; Ping-Chuan Wang; Michael J. Zierak; Seshadri Subbanna; David L. Harame; Dean A. Herman; Bernard S. Meyerson

This paper provides a detailed description of the IBM SiGe BiCMOS and rf CMOS technologies. The technologies provide high-performance SiGe heterojunction bipolar transistors (HBTs) combined with advanced CMOS technology and a variety of passive devices critical for realizing an integrated mixed-signal system-on-a-chip (SoC). The paper reviews the process development and integration methodology, presents the device characteristics, and shows how the development and device selection were geared toward usage in mixed-signal IC development.


ieee gallium arsenide integrated circuit symposium | 2001

40 Gbit/sec circuits built from a 120 GHz f/sub T/ SiGe technology

Greg Freeman; Mounir Meghelli; Young H. Kwark; Steven J. Zier; Alexander V. Rylyakov; Michael A. Sorna; Todd Tanji; Oswin M. Schreiber; Keith M. Walter; Jae Sung Rieh; Basanth Jagannathan; Alvin J. Joseph; Seshadri Subbanna

Product designs for 40 Gbit/sec applications fabricated from SiGe BiCMOS technologies are now becoming available. This paper will briefly discuss technology aspects relating to HBT device operation at high speed, acting to dispel some common misconceptions regarding SiGe HBT technology applicability to 40 Gbit/sec circuits. The high speed portions of the 40 Gbit/sec system are then addressed individually, demonstrating substantial results toward product offerings, on each of the critical high speed elements.


topical meeting on silicon monolithic integrated circuits in rf systems | 2009

A Thin-Film SOI 180nm CMOS RF Switch Technology

Alan B. Botula; Alvin J. Joseph; James A. Slinkman; Randy L. Wolf; Zhong-Xiang He; D. Ioannou; Lawrence Wagner; M. Gordon; Michel J. Abou-Khalil; Richard A. Phelps; Michael L. Gautsch; W. Abadeer; D. Harmon; M. Levy; J. Benoit; James S. Dunn

This paper describes a 180nm CMOS thin film SOI technology developed for RF switch applications. For the first time we show that the well-known harmonic generation issue in HRES SOI technologies can be suppressed with one additional mask. Power handling, linearity, and Ron*Coff product are competitive with GaAs pHEMT and silicon-on-sapphire technologies. Index Terms — RF switch, thin film SOI, wireless, CMOS


IEEE Transactions on Electron Devices | 1999

Optimization of SiGe HBTs for operation at high current densities

Alvin J. Joseph; John D. Cressler; D.M. Richey; Guofu Niu

A comprehensive investigation of the impact of Ge profile shape as well as the scaling of collector and base doping profiles on high-injection heterojunction barrier effects in SiGe HBTs has been conducted over the -73-85/spl deg/C temperature range. The onset of Kirk effect at high current densities is shown to expose the Si/SiGe heterojunction in the collector-base space charge region, thereby inducing a conduction band barrier which negatively impacts the collector and base currents as well as the dynamic response, leading to a premature roll-off in both /spl beta/ and f/sub T/. In light of this, careful profile optimization is critical for emerging SiGe HBT circuit applications, since they typically operate at high current densities to realize maximum performance. We first explore the experimental consequences and electrical signature of these barrier effects over the 200-358 K temperature range for a variety of Ge profiles from an advanced UHV/CVD SiGe HBT technology. We then use extensive simulations which were calibrated to measured results to explore the sensitivity of these barrier effects to both the Ge profile shape and collector profile design, and hence investigate the optimum profile design points as a function of vertical scaling.


IEEE Transactions on Nuclear Science | 2002

An investigation of the origins of the variable proton tolerance in multiple SiGe HBT BiCMOS technology generations

John D. Cressler; Ramkumar Krithivasan; Gang Zhang; Guofu Niu; Paul W. Marshall; Hak S. Kim; Robert A. Reed; Michael J. Palmer; Alvin J. Joseph

This paper presents the first investigation of the physical origins of the observed variable proton tolerance in multiple SiGe HBT BiCMOS technology generations. We use the combination of an extensive set of newly measured proton data on distinct SiGe HBT BiCMOS technology generations, detailed calibrated 2-D MEDICI simulations for both the SiGe HBT and Si CMOS devices, as well as reverse-bias emitter-base and forward-bias electrical stress data to aid the analysis. We find that the scaling-induced increase in the emitter-base electric field under the spacer oxide in the SiGe HBT is primarily responsible for the degraded radiation tolerance with technology scaling, while the decrease in shallow-trench thickness is largely responsible for the improved nFET radiation tolerance with technology scaling.


IEEE Journal of Solid-state Circuits | 2004

Silicon-germanium BiCMOS HBT technology for wireless power amplifier applications

Jeffrey B. Johnson; Alvin J. Joseph; David C. Sheridan; Ramana M. Maladi; Per-Olof Brandt; Jonas Persson; Jesper Andersson; Are Bjorneklett; Ulrika Persson; Fariborz Abasi; Lars Tilly

This paper discusses and illustrates the key device design issues for SiGe BiCMOS HBTs suitable for wireless power amplifier (PA) applications. Experimental results addressing ruggedness, ac performance, and safe operating area for high-breakdown SiGe HBTs built in several generations of BiCMOS technology are presented. Implications of recent high-performance SiGe HBT scaling achievements for BiCMOS technologies targeting wireless PA applications are considered. Circuit results for GSM, PCS, GPRS, and EDGE front-end modules have been obtained. A one-chip solution is demonstrated, including control circuitry and switching functionality, that supports all GPRS, PCS, and EDGE modes featuring output power at 33.8 dBm and overall power added efficiency of 37% withstanding voltage standing wave ratio conditions of 15:1.

Collaboration


Dive into the Alvin J. Joseph's collaboration.

Researchain Logo
Decentralizing Knowledge