Amporn Poyai

Activation energy analysis as a tool for extraction and investigation of p - n junction leakage current components

The origin of p–n junction reverse current is investigated by a method based on the analysis of the leakage current activation energy. Its main advantages lie in the possibility to distinguish multiple reverse-bias dependent leakage components and determine their mechanisms, which can be different than the Shockley–Read–Hall or field-enhanced generation mechanisms. This is illustrated for state-of-the-art silicided shallow junctions, exhibiting a local Schottky effect, due to small-area silicide penetrations. An estimate of the area of the Schottky (or Shannon) contacts follows from the analysis. The method may be used for various semiconductor materials and leakage current origins.

Improved extraction of carrier concentration and depletion width from capacitance-voltage characteristics of silicon N(+)- P-well junction diodes

An accurate method is proposed for the extraction of the carrier concentration profile (pp well) and the depletion width (Wp well) in a p-well region from high-frequency capacitance measurements by accounting for the series resistance and the capacitance of the n+ region. Wp well was calculated from the capacitance in the p-well region (Cp well), while pp well was derived from the slope of the plot 1/Cp well2 versus reverse bias. The pp well extracted was compared with profiles obtained from spreading resistance probe results. The differences between the two techniques are within 15% in the accessible depletion width, which will be discussed in view of the depth resolution anticipated.

Improved extraction of the activation energy of the leakage current in silicon p–n junction diodes

An accurate method is proposed for the extraction of the activation energy ET from the volume generation current density JgA in silicon p–n junctions. It combines temperature-dependent current–voltage (I–V) and capacitance–voltage measurements on an array of diodes with different geometry, in order to separate the peripheral from the volume components. The JgA can be found from the volume leakage current by subtraction of the volume diffusion current JdA, which is calculated from the forward I–V characteristic. To derive the correct slope from an Arrhenius plot of the JgA, several additional corrections have been applied. One is the temperature dependence of the depletion width, which is derived from the corrected volume capacitance. The most important ET change is shown to come from the temperature dependence of the recombination lifetime.

Peripheral current analysis of silicon p–n junction and gated diodes

The peripheral reverse current Ip in silicon p–n junctions sets the leakage and standby power limits in modern integrated circuits. In order to study its origin more in depth, a detailed analysis of the reverse current through a gated diode is developed here. In particular, it is shown that the study of the reverse current component associated with the thick field oxide under depletion and inversion provides a sensitive tool. In addition, combining the gate bias dependence with the temperature variation of the reverse gated diode current allows us to identify its different components, namely, the diffusion JpDIF, the depletion region generation JpGENblk, and the surface generation current density JpGENsrf. Based on this analysis, it is demonstrated that the peripheral diffusion current shows a remarkable increase with gate bias VG, while for standard diodes an increase with the reverse voltage VR is revealed. This bias dependence has to be taken into account when studying the activation energy of the diff...

Impact of a high electric field on the extraction of the generation lifetime from the reverse generation current component of shallow n/sup +/-p-well diodes

A procedure is proposed to extract the thermal generation lifetime (/spl tau//sub g/) profile in the depletion region of shallow n/sup +/-p-well junctions surrounded by shallow trench isolation from the generation current density. This is achieved by taking account of the electric field enhancement factor. As will be shown, a more realistic /spl tau//sub g/ profile is obtained that better reflects the trap density profile, corresponding with the deep boron ion implantation-related extended defects.

p‐n Junction Diagnostics to Determine Surface and Bulk Generation/Recombination Properties of Silicon Substrates

An improved analysis of the p‐n junction current‐voltage (I‐V) and capacitance‐voltage (C‐V) characteristics is proposed and applied to diodes fabricated in a variety of silicon substrates. It is shown that for state‐of‐the‐art processing conditions the diffusion current at room temperature dominates the volume leakage current. The peripheral component, on the other hand, is governed by the surface generation in the birds‐beak region surrounding the complementary metal oxide semiconductor compatible diodes. Nevertheless, a small substrate effect is observed, which can only be resolved by the proposed optimized analysis. For epitaxial wafers, the presence of the highly doped substrate can significantly reduce the volume diffusion current, while for internally gettered Czochralski material the presence of a highly defective bulk region under the denuded zone enhances this current. This complicates the recombination lifetime extraction from I‐V characteristics.

Extraction of the carrier generation and recombination lifetime from the forward characteristics of advanced diodes

Abstract This paper proposes to extract the generation and recombination lifetime simultaneously from the recombination current in forward operation. The method is applied to n + –p-well junctions fabricated in advanced processing schemes on silicon wafers with different grown-in defect concentrations. The value of the recombination lifetime is confirmed by the data obtained from the cross-sectional microwave absorption (MWA) technique. It is also shown that the obtained generation lifetime agrees well with the one found from the reverse current after correction for the generation width and the electric field. In conclusion, the proposed method gives reasonable values for the generation and recombination lifetime in advanced silicon p–n junctions. Mostly, these junctions will be dominated by the processing-induced defects.

Silicon substrate effects on the current–voltage characteristics of advanced p–n junction diodes

An in-depth analysis of the forward and reverse current-voltage characteristics allows determination of the different geometrical (area, perimeter and corner) and physical (diffusion and generation) current components. This is a powerful technique to assess the silicon substrate quality. In this paper it is shown that the diffusion current of a good quality silicon p-n junction is significantly lower for an epitaxial (Epi) wafer compared to a Czochralski (Cz) wafer. This can be explained by a correction factor, F, which depends on the parameters of the highly doped substrate. The impact of the substrate is less pronounced when the leakage current is dominated by the peripheral component. Furthermore, for low reverse bias, current transients occur for large area diodes in Cz substrates. These are related to the presence of generation centres, which are absent in epitaxial wafers.

Impact of cobalt silicidation on the low-frequency noise behavior of shallow p-n junctions

This work describes the low-frequency noise of forward biased shallow p-n junctions fabricated in epitaxial silicon substrates. Particular emphasis is on the effect of silicidation on the low-frequency noise spectral density S/sub I/. It is demonstrated that the observed 1/f noise is significantly larger in Co-silicided junctions compared with the nonsilicided ones. A detailed analysis of the current and geometry dependence of S/sub I/ leads to the conclusion that the 1/f noise is of the generation-recombination (GR) type, with the responsible GR centres homogeneously distributed over the device area. From the correlation with the forward current-voltage (I-V) characteristics, it is derived that GR fluctuations in the hole current through the n/sup +/ region cause the increased 1/f noise in the silicided devices.

Hole-trapping-related transients in shallow n+–p junctions fabricated in a high-energy boron-implanted p well

This letter describes a transient phenomenon in the reverse hole current of large-area shallow n+–p-well junctions, giving rise to a hump at a specific reverse bias. This corresponds to a certain depletion depth in the retrograde p well, which has been fabricated by a deep (200 keV) and a shallow (55 keV) boron ion implantation. No such a reverse hole current hump occurs for reference diodes, processed in p-type Czochralski substrates. The effect is also absent in large-perimeter p-well junctions, suggesting a correlation with defects in the p-well region. The occurrence at a specific depletion depth indicates a nonuniform defect distribution, for example related to the displacement damage created by the 200 keV B implantation. This idea is further supported by deep level transient spectroscopy results, which reveal the presence of a nonuniform density of hole traps, corresponding to a broad range of energy levels from about 0.3 to 0.5 eV above the valence band. A discussion of the possible nature of the ...