Amretashis Sengupta

Performance Analysis of Strained Monolayer

We present a computational study on the impact of tensile/compressive uniaxial (εxx) and biaxial (εxx=εyy) strain on monolayer MoS2, n-, and p-MOSFETs. The material properties like band structure, carrier effective mass, and the multiband Hamiltonian of the channel are evaluated using the density functional theory. Using these parameters, self-consistent Poisson-Schrödinger solution under the nonequilibrium Greens function formalism is carried out to simulate the MOS device characteristics. 1.75% uniaxial tensile strain is found to provide a minor (6%) ON current improvement for the n-MOSFET, whereas same amount of biaxial tensile strain is found to considerably improve the p-MOSFET ON currents by 2-3 times. Compressive strain, however, degrades both n-MOS and p-MOS devices performance. It is also observed that the improvement in p-MOSFET can be attained only when the channel material becomes indirect gap in nature. We further study the performance degradation in the quasi-ballistic long-channel regime using a projected current method.

{\rm MoS}_{2}

In the present work, we have investigated a comparative performance of the silicon (Si) and germanium (Ge) nanoparticles embedded SiO2 floating gate MOS memory devices. In such devices for low applied fields, the tunneling current is dominated by the direct tunneling mechanism, whereas for higher electric fields, the Fowler–Nordheim tunneling mechanism dominates. As the device dimensions get smaller, problem arises in the conventional MOS memory devices due to the leakage through the thin tunnel oxide. This leakage can be reduced via charge trapping by embedding nanoparticles in the gate dielectric of such devices. Here one objective is to prevent the leakage due to the direct tunneling mechanism and the other objective is to reduce the write voltage, by lowering the onset voltage of the Fowler–Nordheim tunneling mechanism. Our simulations for the current voltage characteristics covered both the low and the high applied field regions. Simulations showed that both the Si and the Ge nanoparticles embedded g...

MOSFET

We study the performance of a hybrid Graphene-Boron Nitride armchair nanoribbon (a-GNR-BN) n-MOSFET at its ballistic transport limit. We consider three geometric configurations 3p, 3p + 1, and 3p + 2 of a-GNR-BN with BN atoms embedded on either side (2, 4, and 6 BN) on the GNR. Material properties like band gap, effective mass, and density of states of these H-passivated structures are evaluated using the Density Functional Theory. Using these material parameters, self-consistent Poisson-Schrodinger simulations are carried out under the Non Equilibrium Greens Function formalism to calculate the ballistic n-MOSFET device characteristics. For a hybrid nanoribbon of width similar to 5 nm, the simulated ON current is found to be in the range of 265 mu A-280 mu A with an ON/OFF ratio 7.1 x 10(6)-7.4 x 10(6) for a V-DD = 0.68 V corresponding to 10 nm technology node. We further study the impact of randomly distributed Stone Wales (SW) defects in these hybrid structures and only 2.5% degradation of ON current is observed for SW defect density of 3.18%

Study of the relative performance of silicon and germanium nanoparticles embedded gate oxide in metal–oxide–semiconductor memory devices

We theoretically analyze the performance of transition metal dichalcogenide (MX2) single wall nanotube (SWNT) surround gate MOSFET, in the 10 nm technology node. We consider semiconducting armchair (n, n) SWNT of MoS2, MoSe2, WS2, and WSe2 for our study. The material properties of the nanotubes are evaluated from the density functional theory, and the ballistic device characteristics are obtained by self-consistently solving the Poisson-Schrodinger equation under the non-equilibrium Greens function formalism. Simulated ON currents are in the range of 61-76 mu A for 4.5 nm diameter MX2 tubes, with peak transconductance similar to 175-218 mu S and ON/OFF ratio similar to 0.6 x 10(5)-0.8 x 10(5). The subthreshold slope is similar to 62.22 mV/decade and a nominal drain induced barrier lowering of similar to 12-15 mV/V is observed for the devices. The tungsten dichalcogenide nanotubes offer superior device output characteristics compared to the molybdenum dichalcogenide nanotubes, with WSe2 showing the best performance. Studying SWNT diameters of 2.5-5 nm, it is found that increase in diameter provides smaller carrier effective mass and 4%-6% higher ON currents. Using mean free path calculation to project the quasi-ballistic currents, 62%-75% reduction from ballistic values in drain current in long channel lengths of 100, 200 nm is observed.

Performance analysis of boron nitride embedded armchair graphene nanoribbon metal–oxide–semiconductor field effect transistor with Stone Wales defects

Here, we present a comparative theoretical study on stacked (multilayer) gate dielectric MOS memory devices, having a metallic/semiconducting carbon nanotube (CNT), silicon nanowire (Si NW) and fullerene (C60) embedded nitride layer acting as a floating gate. Two types of devices, one with HfO2–SiO2 stack (stack-1) and the other with La2O3–SiO2 stack (stack-2) as the tunnel oxide were compared. We evaluated the effective barrier height, the dielectric constant and the effective electron mobility in the composite gate dielectric with the Maxwell–Garnett effective medium theory. Thereafter applying the WKB approximation, we simulated the Fowler–Nordheim (F–N) tunnelling/writing current and the direct tunnelling/leakage current in these devices. We evaluated the I–V characteristics, the charge decay and also the impact of CNT/Si NW aspect ratio and the volume fraction on the effective barrier height and the write voltage, respectively. We also simulated the write time, retention time and the erase time of these MOS devices. Based on the simulation results, it was concluded that the metallic CNT embedded stack-1 device offered the best performance in terms of higher F–N tunnelling current, lower direct tunnelling current and lesser write voltage and write time compared with the other devices. In case of direct tunnelling leakage and retention time it was found that the met CNT embedded stack-2 device showed better characteristics. For erasing, however, the C60 embedded stack-1 device showed the smallest erase time. When compared with earlier reports, it was seen that CNT, C60 and Si NW embedded devices all performed better than nanocrystalline Si embedded MOS non-volatile memories.

Performance limits of transition metal dichalcogenide (MX2) nanotube surround gate ballistic field effect transistors

We present the effect of different stacking orders on carrier transport properties of multi-layer black phosphorous. We consider three different stacking orders AAA, ABA and ACA, with increasing number of layers (from 2 to 6 layers). We employ a hierarchical approach in density functional theory (DFT), with structural simulations performed with generalized gradient approximation (GGA) and the bandstructure, carrier effective masses and optical properties evaluated with the meta-generalized gradient approximation (MGGA). The carrier transmission in the various black phosphorous sheets was carried out with the non-equilibrium greens function (NEGF) approach. The results show that ACA stacking has the highest electron and hole transmission probabilities. The results show tunability for a wide range of band-gaps, carrier effective masses and transmission with a great promise for lattice engineering (stacking order and layers) in black phosphorous.

Comparative study of CNT, silicon nanowire and fullerene embedded multilayer high-k gate dielectric MOS memory devices

We investigate the effect of stacking order of bilayer black phosphorene on the device properties of p-MOSFET and n-MOSFET. Two layers of black phosphorus are stacked in three different orders and are used as channel material in both n-MOSFET and p-MOSFET devices. The effects of different stacking orders on electron and hole effective masses and output characteristics of MOSFETs, such as ON currents, ON/OFF ratio, and transconductance are analyzed. Our results show that about 1.37 times and 1.49 times increase in ON current is possible along armchair and zigzag directions, respectively, 55.11% variation in transconductance is possible along armchair direction, by changing stacking orders (AA, AB, and AC) and about 8 times increase in ON current is achievable by changing channel orientation (armchair or zigzag) in p-MOSFET. About 14.8 mV/V drain induced barrier lowering is observed for both p-MOSFET and n-MOSFET, which signifies good immunity to short channel effects.

Stacking dependence of carrier transport properties in multilayered black phosphorous

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Effect of stacking order on device performance of bilayer black phosphorene-field-effect transistor

In this paper we show the effect of electron-phonon scattering on the performance of monolayer (1L) MoS2 and WSe2 channel based n-MOSFETs. Electronic properties of the channel materials are evaluated using the local density approximation (LDA) in density functional theory (DFT). For phonon dispersion we employ the small displacement / frozen phonon calculations in DFT. Thereafter using the non-equilibrium Greens function (NEGF) formalism, we study the effect of electron-phonon scattering and the contribution of various phonon modes on the performance of such devices. It is found that the performance of the WSe2 device is less impacted by phonon scattering, showing a ballisticity of 83% for 1L-WSe2 FET for channel length of 10 nm. Though 1L-MoS2 FET of similar dimension shows a lesser ballisticity of 75%. Also in the presence of scattering there exist a a 21-36% increase in the intrinsic delay time (tau) and a 10-18% reduction in peak transconductance (g(m)) for WSe2 and MoS2 devices respectively

Introduction to Nano

We present a computational study on the impact of line defects on the electronic properties of monolayer MoS2. Four different kinds of line defects with Mo and S as the bridging atoms, consistent with recent theoretical and experimental observations, are considered herein. We employ the density functional tightbinding (DFTB) method with a Slater-Koster-type DFTB-CP2K basis set for evaluating the material properties of perfect and the various defective MoS2 sheets. The transmission spectra are computed with a DFTB-non-equilibrium Greens function formalism. We also perform a detailed analysis of the carrier transmission pathways under a small bias and investigate the phase of the transmission eigenstates of the defective MoS2 sheets. Our simulations show a two to four fold decrease in carrier conductance of MoS2 sheets in the presence of line defects as compared to that for the perfect sheet.