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Dive into the research topics where An-Jhih Su is active.

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Featured researches published by An-Jhih Su.


symposium on vlsi technology | 2012

An ultra-thin interposer utilizing 3D TSV technology

Wen-Chih Chiou; Kuo-Nan Yang; J.L. Yeh; S.H. Wang; Y.H. Liou; Tsang-Jiuh Wu; J.C. Lin; C.L. Huang; S.W. Lu; C.C. Hsieh; H.A. Teng; C.C. Chiu; H. B. Chang; T. S. Wei; Yen-Liang Lin; Yen-Huei Chen; H.J. Tu; H.D. Ko; T.H. Yu; J.P. Hung; P.H. Tsai; D.C. Yeh; W.C. Wu; An-Jhih Su; S.L. Chiu; Shang-Yun Hou; D.Y. Shih; Kim Hong Chen; S.P. Jeng; Chen-Hua Yu

To achieve ultra small form factor package solution, an ultra-thin (50μm) Si interposer utilizing through-silicon-via (TSV) technology has been developed. Challenges associated with handling thin wafer and maintaining package co-planarity have been overcome to stack thin dies (200 μm) on ultra-thin interposer. Improved electrical performance and the advantages of this innovative thin interposer are highlighted in this paper. Warpage behavior is investigated with simulation and experiments to ensure reliability and robustness of the Si stack. Reduction in package thickness is realized to achieve high functionality, small form factor, better electrical performance and robust reliability by stacking thin dies on ultra-thin interposer.


Archive | 2010

Cylindrical Embedded Capacitors

An-Jhih Su; Chi-Chun Hsieh; Tzu-Yu Wang; Wei-Cheng Wu; Hsien-Pin Hu; Shang-Yun Hou; Wen-Chih Chiou; Shin-puu Jeng


Archive | 2011

Bump with protection structure

Chen-Hua Yu; Hung-Pin Chang; An-Jhih Su; Tsang-Jiuh Wu; Wen-Chih Chiou; Shin-puu Jeng


Archive | 2013

Chip-on-Substrate Packaging on Carrier

Chen-Hua Yu; Tzu-shiun Sheu; Shin-puu Jeng; Shih-Peng Tai; An-Jhih Su; Chi-Hsi Wu


Archive | 2013

Packages with Thermal Interface Material on the Sidewalls of Stacked Dies

Chen-Hua Yu; Wensen Hung; Szu-Po Huang; An-Jhih Su; Hsiang-Fan Lee; Kim Hong Chen; Chi-Hsi Wu; Shin-puu Jeng


Archive | 2010

Radiate under-bump metallization structure for semiconductor devices

Tzu-Yu Wang; Chi-Chun Hsieh; An-Jhih Su; Hsien-Wei Chen; Shin-puu Jeng; Liwei Lin


Archive | 2017

Integrated Fan-Out Structure and Method of Forming

Hsien-Wei Chen; An-Jhih Su; Tsung-Shu Lin


Archive | 2016

INTEGRATED CIRCUIT PACKAGE PAD AND METHODS OF FORMING

Hsien-Wei Chen; Chen-Hua Yu; Chi-Hsi Wu; Der-Chyang Yeh; An-Jhih Su; Wei-Yu Chen


Archive | 2017

WAFER LEVEL SHIELDING IN MULTI-STACKED FAN OUT PACKAGES AND METHODS OF FORMING SAME

Wei-Yu Chen; Hsien-Wei Chen; An-Jhih Su; Jo-Mei Wang; Tien-Chung Yang


Archive | 2017

Devices Employing Thermal and Mechanical Enhanced Layers and Methods of Forming Same

Chen-Hua Yu; An-Jhih Su; Wei-Yu Chen; Ying-Ju Chen; Tsung-Shu Lin; Chin-Chuan Chang; Hsien-Wei Chen; Wei-Cheng Wu; Der-Chyang Yeh; Li-Hsien Huang; Chi-Hsi Wu

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