Andre G. Metzger

An extended Doherty amplifier with high efficiency over a wide power range

An extension of the Doherty amplifier architecture which maintains high efficiency over a wide range of output power (>6 dB) is presented. This extended Doherty amplifier is demonstrated experimentally with InGaP-GaAs HBTs at a frequency of 950 MHz. P/sub 1 dB/ is measured at 27.5 dBm with PAE of 46%. PAE of at least 39% is maintained for over an output power range of 12 dB backed-off from P/sub 1 dB/. This is an improvement over the classical Doherty amplifier, where high efficiency is typically obtained up to 5-6 dB backed-off from P/sub 1 dB/. Generalized design equations for the Doherty amplifier are derived to show a careful choice of the output matching circuit and device scaling parameters can improve efficiencies at lower output power.

Digital generation of RF signals for wireless communications with band-pass delta-sigma modulation

This paper demonstrates a high speed digital technique to produce binary (digital) signals that encode representative RF signals (with time varying envelope) as needed for wireless communications. Specifically, it shows that IS-95 format CDMA signals can be generated with a single bit digital data stream at 3.6 Gb/S. The technique uses band-pass delta-sigma modulation so that the quantization noise is shaped out of the frequency band of interest. This approach points the way to single-chip, DSP-based transmitters, used in conjunction with switching mode power amplifiers and simple analog filters, to implement all the functions of a wireless transmitter.

A 10-Gb/s high-isolation, 16/spl times/16 crosspoint switch implemented with AlGaAs/GaAs HBT's

A high-isolation, 16/spl times/16 crosspoint switch is reported, capable of aggregate data throughput of 160 Gb/s with low crosstalk and output jitter. Each of the 16 fully asynchronous channels can transmit data at rates up to 10 Gb/s with a worst case r.m.s. output jitter of 4 ps. Single channel operation output jitter below 2.8 ps r.m.s. has been demonstrated. The high-isolation circuitry allows for inter-channel crosstalk isolation of more than 40 dB with all channels operative. The circuit is based on AlGaAs/GaAs heterojunction bipolar transistor technology.

A 10 Gb/s 12x12 cross-point switch implemented with AlGaAs/GaAs heterojunction bipolar transistors

A 12x12 cross-point switch is reported which operates with data rate per channel of 10 Gb/s. The aggregate data rate for the switch, 120 Gb/s, is one of the highest of any reported IC. The circuit is based on AlGaAs/GaAs HBT technology and employs a double switching architecture to minimize jitter. An rms jitter below 4 psec has been demonstrated.

High efficiency current-mode class-D amplifier with integrated resonator

This paper shows that current mode class-D (CMCD) amplifiers with integrated parallel LC resonator can achieve high efficiency at RF frequencies. In contrast to the conventional class-D amplifier, output shunt capacitance discharge loss is eliminated in a CMCD amplifier topology by satisfying the zero voltage switching (ZVS) condition. To reduce parasitic resistance, bondwires are utilized to implement a high Q inductor in the LC resonator. An experimental CMCD amplifier with collector efficiency of 78.5% at output power of 29.5dBm (0.89W) is demonstrated using GaAs HBTs at 700 MHz.

A 64-bit High-Speed Read-Write Look-Up Table Memory Implemented in GaAs HBT

This work describes a novel low-density bipolar memory circuit which functions near the maximum clock rate of the technology. An InGaP/GaAs HBT implementation of a 64-bit programmable look up table memory is demonstrated. By simulation, the read function shows a 23ps delay through the memory array. Measurements of the circuit in package validates successful read operation at 5GHz

High speed crosspoint switches

Technology and performance of electronic crosspoint switches with data rates above 1 Gb/s/channel are reviewed. Switch applications and architectures are described, as well as the principal problems in achieving low output jitter. Recent results for different IC technologies are summarized. As a particular example, a 10 Gb/s crosspoint switch implemented in GaAlAs/GaAs-HBT technology is described, including details of design, packaging, testing methodology, and performance results.

Highly linear photoreceiver design for application to ultrahigh-bandwidth photonic A/D converters

Analog-to-digital converters operating at unprecedented speeds and resolutions are presently under development using a combination of photonics and electronics techniques. These systems impose stringent performance constraints on the photoreceivers used for photonic - electronic conversion, particularly in regard to linearity and noise. Photodetectors must accommodate optical pulses with very high input powers iwthout saturation, and the pulse input energy must be accurately determined. This paper presents design considerations and simulations of photodetectors and associated preamplifiers to meet these goals.

WEST (WDM and electronic switching technology) project: 40 Gb/s WDM system review

Formed in January 1995, WEST is a DARPA-supported consortium investigating technologies for implementing add-drop and cross-connect switches operating at 10 Gbit/s. Using wavelength division multiplexing (WDM), each fiber supports 40 Gbit/s (4 by 10 Gbit/s) aggregate bandwidth for SONET/SDH operation. Consortium members include Rockwell Corporation, Ortel Corporation, UCSB, UCSD, UCLA, and Caltech/JPL.