Andreas C. Doering

The DOME embedded 64 bit microserver demonstrator

We describe the motivation, goals and decision process of the IBM-ASTRON DOME microserver project. With our research demonstrator we aim to evaluate the applicability of this technology for performing the processing required for the Square Kilometer Array instrument as well as for new business workloads. Our focus is on energy efficiency employing hot-water cooling and cost-effectiveness. We show how we were able to get business applications running on high-performance system-on-a-chip parts designed for embedded systems, and show the current status of our project.

Dual function heat-spreading and performance of the IBM/ASTRON DOME 64-bit μServer demonstrator

For the IBM-ASTRON DOME μServer project, we are currently building two types of memory DIMM-like form factor compute node boards. The first is based on a 4 core 2.2 GHz SoC and the second on a 12 core / 24 thread 1.8 GHz SoC. Both employ the 64-bit Power instruction set. Our innovative hot-water based cooling infrastructure also supplies the electrical power to our compute node board. We show initial performance results and conclude with the key lessons we have learnt and an outlook on our next activities.

Power measurements and cooling of the DOME 28nm 1.8GHz 24-thread ppc64 μServer compute node

Within the IBM/ASTRON DOME μServer project, we are finishing two types of memory DIMM-like sized compute nodes. The first is based on the 4-core/4-thread 2.2 GHz P5040 45nm SoC and the second on a 12-core/24-thread 1.8 GHz T4240 28nm SoC. Both SoCs employ the 64-bit Power instruction set. We show T4240 Specbench performance results, power consumption, describe the packaging of our first P5040 based 8-way hot-water cooled cluster and provide an outlook.

Monitoring and Controlling System for Microservers

The strong growth of mobile device usage, such as smart phones and tablet computers motivates the creation of anew class of servers, micro servers. In the same way, rack servers used PC processors, and blade servers used notebook processors when those computer classes became widespread, microserversuse the devices that are employed for mobile devices and their infrastructure. Micro servers need a larger network compared to previous servers, though most of it is hidden within one box. Furthermore, a larger amount of system health data is created and needs to be handled. Since the components for microserversare made for compact devices, micro servers can be built with ahigh density. The density can in turn result in lower cost and lower power consumption by saving board-to-board wiring and physical interface chips.

Microserver + micro-switch = micro-datacenter

Many computational workloads from commercial and scientific fields have high demands in total throughput, and energy efficiency. For example the largest radio telescope, to be built in South Africa and Australia combines cost, performance and power targets that cannot be met by the technological development until its installation. In processor architecture a design tradeoff between cost and power efficiency against single-thread performance is observed. Hence, to achieve a high system power efficiency, large-scale parallelism has to be employed. In order to maintain wire length, and hence network delays, energy losses, and cost, the volume of compute nodes and network switches has to be reduced to a minimum âĂŞ hence the term microserver. Our DOME microserver compute card measures 130 by 7.5 by 65 mm3. The presented switch module is confined to the same area (140 by 55 mm2), yet is deeper (40mm) because of the 630-pin high-speed connector. For 64 ports of 10Gbit Ethernet (10Gbase-KR) our switch consumes about 150W maximal. In addition to the switch ASIC (Intel FM6000 series), the power converters, clock generation, configuration memory and management processor is integrated on a second PCB. The switch management (âĂIJControl PointâĂİ) is implemented in a separate compute node. In the talk options to integrate the management into the switch (same volume as now) will be discussed. Another topic covered is the cooling of the microserver, and of the switch in particular, using (warm) water in the infrastructure and heat pipes on the module.

Determination of one-way bandwidth of cellular automata using Binary Decision Diagrams

Cellular Automata are an inherently parallel computing architecture and can be scaled close to the physical limits due to the local-only data exchange. For economical and technical reasons application of cellular automata as computer architecture requires the use of partitions that are assembled into larger units, similar to memory in current systems (memory chips, Dual-In-line Memory Modules, etc.). This requires the exchange of the cell state at the chip boundaries. In this paper we consider the analysis of the required bandwidth over a chip boundary when a one-way protocol is used. The analysis algorithm counts the number of equivalence classes with respect to the cell states on the send side. When the states along the chip boundary are combined, a closed form solution for the number of equivalence classes is derived. The algorithm can be implemented using Binary Decision Diagrams, and we give results for several example cellular automata.