Silvio Dragone

The next generation of highly reliable and secure encryption for the IBM z13

New business opportunities for cloud, analytics, mobile, and social applications depend on a secure computing infrastructure. The introduction of the IBM 4767 cryptographic coprocessor continues IBM leadership in marketplace security. The IBM 4767/Crypto Express5S is a versatile solution, offering three modes of operations on the IBM z13™ System: 1) Accelerator, 2) Common Cryptographic Architecture (CCA) Coprocessor, and 3) Enterprise PKCS #11 (public-key cryptography standard) Coprocessor. The highly programmable cryptographic coprocessor environment features a new ASIC (application-specific integrated circuit), FPGA (field-programmable gate array), and enhanced performance. The innovative internal hardware and firmware can be easily updated to achieve new security standards and requirements as well as new customer-specific functionality. The secure APIs (application programming interfaces) are designed to support standard cryptographic functions as well as specialized banking and financial functions. This is done in a way that allows the sensitive key material never to be exposed outside the physical secure boundary in a clear format. Performance benefits include the incorporation of elliptic curve cryptography (ECC) and format preserving encryption (FPE) in the hardware. For the z13, the number of logical domains has been increased from 16 to 85, allowing more system versatility. This new design also supports SRIOV (single root I/O virtualization) and the ability to customize arbitration to target SRIOV or quality of service.

Stateless cryptography for virtual environments

Migrating systems onto virtualized environments, such as cloud platforms, is becoming a business imperative. Such platforms offer the promise of higher resilience combined with a relatively low cost of ownership. The platforms also involve a number of challenges that hinder their adoption, and a primary concern involves security. These security concerns stem in part from vulnerabilities that underlying virtualization functionality introduces, such as the ability to capture and replay the execution state of a virtualized machine. In systems where security is paramount, HSMs (hardware security modules) are often used. HSMs provide a tamper-resistant environment for storing sensitive cryptographic material and for executing cryptographic operations using this material. HSMs may appear to be important components for enhancing the security of virtual environments; however, current implementations are not well suited for this purpose. In this paper, we describe a typical HSM solution stack based on the de facto industry standard called PKCS #11 (Public Key Cryptography Standard # 11). We explain the challenges introduced by virtualized platforms and show why the typical architectures based on PKCS #11 are not suitable for such environments. Finally, we describe an alternative IBM HSM solution called EP11 (Enterprise PKCS #11) and show how it addresses many of these challenges.

The ordering of events in a prototyping platform

The performance of software-based verification strategies is not keeping up with the increasing complexity of modern system-on-chip (SoC) designs. Therefore modular prototyping platforms are proposed to validate SoC designs. Most of these platforms consist of real processors combined with programmable logic, e.g. FPGA, that communicate through a board-level interconnect system. Usually, the programmable logic and the interconnect system do not run at the target clock speed of the future design. Hence, the emulated processes of the prototyping platform have to be synchronized to provide an accurate system validation. Most synchronization concepts are only able to synchronize the process data flows if data is time-independent. In this paper we present an event-based prototyping platform consisting of real processors combined with FPGAs. This platform emulates events with cycle accuracy, even though the processes operate in different scaled clock domains. Therefore we are able to validate time-dependent data flows.