Antonio J. Garcia-Loureiro

Implementation of the Density Gradient Quantum Corrections for 3-D Simulations of Multigate Nanoscaled Transistors

An efficient implementation of the density-gradient (DG) approach for the finite element and finite difference methods and its application in drift-diffusion (D-D) simulations is described in detail. The new, second-order differential (SOD) scheme is compatible with relatively coarse grids even for large density variations thus applicable to device simulations with complex 3-D geometries. Test simulations of a 1-D metal-oxide semiconductor diode demonstrate that the DG approach discretized using our SOD scheme can be accurately calibrated against Schrödinger-Poisson calculations exhibiting lower discretization error than the previous schemes when using coarse grids and the same results for very fine meshes. 3-D test D-D simulations using the finite element method are performed on two devices: a 10 nm gate length double gate metal-oxide-semiconductor field-effect transistor (MOSFET) and a 40 nm gate length Tri-Gate fin field-effect transistor (FinFET). In 3-D D-D simulations, the SOD scheme is able to converge to physical solutions at high voltages even if the previous schemes fail when using the same mesh and equivalent conditions. The quantum corrected D-D simulations using the SOD scheme also converge with an atomistic mesh used for the 10 nm double gate MOSFET saving computational resources and can be accurately calibrated against the results from non-equilibrium Greens functions approach. Finally, the simulated ID-VG characteristics for the 40 nm gate length Tri-Gate are in an excellent agreement with experimental data.

Benchmarking of Scaled InGaAs Implant-Free NanoMOSFETs

The potential performance of n-type implant-free (IF) III-V nanoMOSFETs with an In0.75Ga0.25As channel is studied using finite-element heterostructure Monte Carlo (MC) and parallel 3D drift-diffusion (D-D) simulations. These devices, scaled to gate lengths of 30, 20, and 15 nm, are compared with the equivalent gate length In0.3Ga0.7As channel IF MOSFETs and with a state-of-the-art Si TriGate FinFET. The benchmarking study is based on careful calibration of the MC simulator against experimental transport data obtained from relevant delta-doped heterostructures with a high-k gate dielectric. At 0.8-V supply voltage, the 30-nm gate length In0.75Ga0.25As channel IF III-V MOSFET is predicted to deliver a drive current of 2880 muA/mum and to have a subthreshold slope of 94.7 mV/dec compared with 2380 muA/mum for an equivalent gate length In0.3Ga0.7As channel IF MOSFET. When the In0.75Ga0.25As channel IF transistor is scaled to 20- and 15-nm gate lengths, the drive current increases to 3520 and 3605 muA/mum, featuring subthreshold slopes of 107.8 and 131.7 mV/dec, respectively. The threshold voltage variability induced by the discrete dopants in the delta-doped plane is studied using 3-D D-D simulations. The 30-, 20-, and 15-nm gate length In0.7Ga0.25As channel IF transistors exhibit threshold voltage standard deviations of 42, 58, and 61 mV, respectively, which are close to or lower than those observed in bulk Si MOSFETs with equivalent gate lengths.

Quantum Corrections Based on the 2-D Schrödinger Equation for 3-D Finite Element Monte Carlo Simulations of Nanoscaled FinFETs

Solutions of the 2-D Schrödinger equation across the channel using a finite element method have been implemented into a 3-D finite element (FE) ensemble Monte Carlo (MC) device simulation toolbox as quantum corrections. The 2-D FE Schrödinger equation-based quantum corrections are entirely calibration free and can accurately describe quantum confinement effects in arbitrary device cross sections. The 3-D FE quantum corrected MC simulation is based on the tetrahedral decomposition of the simulation domain and the 2-D Schrödinger equation is solved at prescribed transverse planes of the 3-D mesh in the transport direction. We apply the method to study output characteristics of a nonplanar nanoscaled MOSFET, a{10.7}-nm gate length silicon-on-insulator FinFET, investigating 〈100〉 and 〈110〉 channel orientations. The results are then compared with those obtained from 3-D FE MC simulations with quantum corrections via the density gradient method showing very similar I-V characteristics but very different density distributions.

3D Finite Element Monte Carlo Simulations of Multigate Nanoscale Transistors

A 3D ensemble Monte Carlo device simulation tool with quantum corrections based on the tetrahedral decomposition of a simulation domain has been developed for the modeling of electron transport in nonplanar nano-MOSFETs. This 3D tool includes a presimulation drift-diffusion transport model which can also be used separately. A discretization by finite element method can accurately describe a 3D device geometry and speed up complex 3D simulations. The quantum corrections are included via a density gradient approach and the interface roughness via Andos model. ID - VG characteristics of a 25-nm gate length Si silicon-on-insulator (SOI) FinFET, selected as an application example, shows an excellent agreement with experimental data including the subthreshold slope. We show that the device on-current for a (110) channel orientation could be improved by about 15% for a (100) channel orientation. The role of quantization of energy levels affecting the distribution of electron density at sidewalls of the SOI FinFET is found to be different at low (0.05 V) and high (1.0 V) gate biases.

Multijunction Concentrator Solar Cells: Analysis and Fundamentals

Multijunction (MJ) concentrator solar cells are primarily constructed of III-V semiconductor materials. The high solar-conversion efficiencies of these devices are dependent on precise control of growth conditions using one of several techniques such as molecular beam epitaxy, metal organic chemical vapour, or metal organic vapour-phase epitaxy deposition. The use of several junctions in an MJ tandem stack allows these devices to achieve efficiencies that are not possible for single-junction devices. Their behaviour is consequently complex, but it can be understood through an examination of the external quantum efficiency and the temperature dependence of each cell in the stack. This chapter lays out a systematic approach for understanding the spectral and temperature dependence of the overall MJ device by way of consideration of its component subcells. The efficiency of the cell as a function of temperature and concentration is described for both lattice-matched and metamorphic triple-junction (TJ) solar cells. The electrical characteristics and current–voltage curves are described from these considerations, and the performance of MJ solar cells under real operating conditions are then presented by considering a term describing the overall thermal factor and another term for the spectral factor. These terms can be understood from the background presented in the previous sections. Finally, the power output for the complete cell incorporated into a Fresnel lens‒based high-concentration photovoltaic system is presented for a particular geographic location using meteorological data.

Reduction of the self-forces in Monte Carlo simulations of semiconductor devices on unstructured meshes

When using an unstructured mesh for device geometry, the ensemble Monte Carlo simulations of semiconductor devices may be affected by unwanted self-forces resulting from the particle-mesh coupling. We report on the progress in minimisation of the self-forces on arbitrary meshes by showing that they can be greatly reduced on a finite element mesh with proper interpolation functions. The developed methodology is included into a self-consistent finite element 3D Monte Carlo device simulator. Minimising of the self-forces using the proper interpolation functions is tested by simulating the electron transport in a 10 nm gate length, 6.1 nm body thick, double gate metal-oxide-semiconductor field-effect transistor (MOSFET). We demonstrate the reduction in the self-force and illustrate the practical distinction by showing I-V characteristics for the device.

Comparison of Fin-Edge Roughness and Metal Grain Work Function Variability in InGaAs and Si FinFETs

The fin-edge roughness (FER) and the TiN metal grain work function (MGW)-induced variability affecting OFF and ON device characteristics are studied and compared between a 10.4-nm gate length In0.53Ga0.47As FinFET and a 10.7-nm gate length Si FinFET. We have analyzed the impact of variability by assessing five figures of merit (threshold voltage, subthreshold slope, OFF-current, drain-induced-barrier-lowering, and ON-current) using the two state-of-the-art in-house-build 3-D simulation tools based on the finite-element method. Quantum-corrected 3-D drift-diffusion simulations are employed for variability studies in the subthreshold region while, in the ON-region, we use quantum-corrected 3-D ensemble Monte Carlo simulations. The In0.53Ga0.47As FinFET is more resilient to the FER and MGW variability in the subthreshold compared with the Si FinFET due to a stronger quantum carrier confinement present in the In0.53Ga0.47As channel. However, the ON-current variability is between 1.1 and 2.2 times larger for the In0.53Ga0.47As FinFET than for the Si counterpart, respectively.

Analysis of high concentrator photovoltaic modules in outdoor conditions: Influence of direct normal irradiance, air temperature, and air mass

The study of high concentrator photovoltaic (HCPV) technology under real conditions is essential to understand its real behavior. The influence of direct normal irradiance (DNI), air temperature (Tair), and air mass (AM) on the maximum power of two HCPV modules was studied for more than three years. Results found are presented in this paper. As expected, the main influence on the maximum power is DNI. Also, Tair has been found to have small influence on the maximum power. Regarding AM, two different behaviors have been found. The maximum power could be considered independent of AM for AM ≤ 2, while it decreases with an approximate linear behavior for AM > 2. Also, the maximum power of a HCPV module could be estimated with a linear mathematical fitting based on DNI, Tair, and AM.

Simulation of the effect of p-layer properties on the electrical behaviour of a-Si:H thin film solar cells

Simulation data of the performance of amorphous silicon (a-Si:H) thin film solar cells using the software package Sentaurus TCAD (Synopsis Inc.) are presented. The Sentaurus software is configured with standard theoretical models describing e.g. the density of states in the mobility gap of a-Si:H, generation/recombination statistics, optical data of a-Si:H thin films etc. to calculate illuminated current voltage curves and the respective spectral response for the initial and degraded state of the solar cell. For the selected physical properties of the solar cell the simulation data predicts a maximum of the efficiency for an intrinsic a-Si:H layer thickness between 200–250 nm. Furthermore, a guideline for the optimization of the p-doped layer thickness and the doping concentration is given.

3-D Finite Element Monte Carlo Simulations of Scaled Si SOI FinFET With Different Cross Sections

Nanoscaled Si SOI FinFETs with gate lengths of 12.8 and 10.7 nm are simulated using 3-D finite element Monte Carlo (MC) simulations with 2-D Schrodinger-based quantum corrections. These nonplanar transistors are studied for two cross sections: rectangular-like and triangular-like, and for two channel orientations: (100) and (110). The 10.7-nm gate length rectangular-like FinFET is also simulated using the 3-D nonequilibrium Greens functions (NEGF) technique and the results are compared with MC simulations. The 12.8 and 10.7 nm gate length rectangular-like FinFETs give larger drive currents per perimeter by about 33- 37% than the triangular-like shaped but are outperformed by the triangular-like ones when normalised by channel area. The devices with a (100) channel orientation deliver a larger drive current by about 11% more than their counterparts with a (110) channel when scaled to 12.8 nm and to 10.7 nm gate lengths. ID - VG characteristics obtained from the 3-D NEGF simulations show a remarkable agreement with the MC results at low drain bias. At a high drain bias, the NEGF overestimates the on-current from about VG - VT = 0.3 V because the NEGF simulations do not include the scattering with interface roughness and ionized impurities.