Apirak Suadet

Low voltage adjustable CMOS Schmitt trigger

This paper presents a low voltage adjustable CMOS Schmitt trigger using dynamic threshold MOS (DTMOS). Cross-coupled inverter with body control is employed to speed up the switching process, and control the intensity of the feedback. The proposed Schmitt trigger has been designed using 0.18 μm 0.4 V CMOS technology and analyzed using PSPICE with BSIM3V3 device models. The simulation results show rail-to-rail operation and independently adjustable switching voltages for both low-to-high (VT(LH)) and high-to-low (VT(HL)) as high as 15 % of the supply voltage. The power dissipation is 0.13 μW.

An ultra low voltage rail-to-rail DTMOS voltage follower

An ultra low voltage rail-to-rail DTMOS voltage follower is presented. The circuit is developed based on a complementary source follower with a common-source output stage. The circuit is designed using a 0.13 μm CMOS technology and SPICE is used to verify the circuit performance. The voltage follower can drive ± 0.25 V to the 500 Ω with the total harmonic distortion (THD) of 0.4% at the operating frequency of 1 MHz. The bandwidth and power dissipation are 288 MHz and 103 μW, respectively.

A 1 Volt CMOS Pseudo Differential Amplifier

This paper presents a 1 V CMOS pseudo differential amplifier using simple rail-to-rail CMFB circuit. The proposed circuit employs the complementary common mode feedback (CMFB) consisting of common mode detector, transimpedance and transconductance amplifiers. The simulation results using HSPICE under a 0.18 mum CMOS technology shows that the rail to rail output swing is achieved with low common mode gain (-36 dB). The differential output swing of the circuit is plusmn0.7 V. The power dissipation of the circuit is 0.23 mW

A 0.5 V quasi-floating-gate (QFG) inverter-based class-AB gain-bandwidth independent amplifier

This paper presents a 0.5 V QFG inverter-based class-AB gain-bandwidth independent amplifier. The circuit employs positive feedback to enhance the input impedance, and feed-forward technique to suppress the common-mode gain. The circuit is designed using 0.18 µm CMOS technology under 0.5 V supply. The simulation results show nearly constant bandwidth for various gain, rail-to-rail input/output swing, suppressed common-mode response, and good linearity. The power dissipation is 275 µW.

A 1.0 volt thermal noise-canceling CMOS transimpedance-based amplifier

This paper presents a design of 1.0 V thermal noise-canceling amplifier using 0.13 mum CMOS technology. The amplifier consists of a CMOS inverter-based transimpedance amplifier, and a noise-canceling circuitry. The thermal noise-canceling circuitry is very simple, and consists of only two CMOS inverters. The simulation result shows the input referred noise of the proposed amplifier is 3 nV/radicHz, which is 21 percent less than that of the transimpedance amplifier. The bandwidth of the circuit (omega-3dB) is 1 GHz, and the power dissipation is 163 muW.

A 0.8 V quasi-floating-gate fully differential CMOS op-amp with positive feedback

This paper presents a 0.8 V fully differential CMOS op-amp. The input stage of the circuit is designed using quasi-floating-gate (QFG) transistors with positive feedback, while QFG transistors in the output stage are connected in the class AB configuration. QFG transistors are employed, enabling the circuit to operate under low supply voltage. The proposed amplifier is designed using 0.18 µm CMOS technology, and simulation results show rail-to-rail input and output swings. The open-loop gain is 80.4 dB with the gain-bandwidth product of 8.66 MHz. Phase margin is 45° (CL= 20 pF). The CMRR is 107 dB (at 1 kHz) and the power consumption is 54.9 µW.

A Simple Rail-to-Rail CMOS Voltage Follower

A simple rail-to-rail CMOS voltage follower is presented. The proposed circuit is developed based on a conventional class AB voltage follower. The circuit is designed using a 0.5 mum CMOS technology and HSPICE is used to verify the circuit performance. The circuit operates under the supply of plusmn1.5 V. The voltage follower can drive plusmn1.25 V to the 250 Omega with the total harmonic distortion of less than 0.25 % at the operating frequency of 10 KHz. The power dissipation is 3.03 mW

A 0.8 V class-AB linear OTA using DTMOS for high-frequency applications

This paper presents a 0.8 V class-AB linear operational transconductance amplifier (OTA) using DTMOS for high-frequency applications. The circuit employs positive feedback to enhance the input impedance, and feed-forward technique to suppress the common-mode gain. The circuit is designed using 0.18 μm CMOS technology under 0.8 V supply. The simulation results show rail-to-rail input/output swing, suppressed common-mode response, and good linearity (less than −48 dB with input 0.6 Vpp, 5 MHz). The power dissipation is 155 μW.

A 0.5 V class AB quasi FGMOS pseudo fully differential CMOS op-amp with rail-to-rail input/output swing

This paper presents a 0.5 V pseudo fully differential CMOS op-amp with rail-to-rail input/output swing. The circuit is designed based on class AB input and output stages. In the design, quasi FGMOS transistors are employed. The proposed amplifier is designed using 0.18 μm CMOS technology, and the simulation results show rail-to-rail input and output swings. The open-loop gain and gain-bandwidth product show 73.3 dB and 12.6 MHz. The CMRR is 73.2 dB (at 1 kHz) and the power consumption is 27.9 μW.

A 0.5 volt rail-to-rail CMOS pseudo-differential OTA using simple feed-forward technique

This paper presents a low voltage CMOS pseudo differential OTA using simple feed-forward technique. The circuit employs feed-forward technique to suppress the common-mode gain, and positive feedback to enhance the output impedance. The circuit is designed using 0.18 µm CMOS technology under 0.5 V supply. The simulation results show rail-to-rail input/output swing, achieved with low common-mode gain (−35 dB). The output swing of the circuit is 0.3 Vpp. The power dissipation of the circuit is 50 µW.