Thawatchai Thongleam

Low voltage adjustable CMOS Schmitt trigger

This paper presents a low voltage adjustable CMOS Schmitt trigger using dynamic threshold MOS (DTMOS). Cross-coupled inverter with body control is employed to speed up the switching process, and control the intensity of the feedback. The proposed Schmitt trigger has been designed using 0.18 μm 0.4 V CMOS technology and analyzed using PSPICE with BSIM3V3 device models. The simulation results show rail-to-rail operation and independently adjustable switching voltages for both low-to-high (VT(LH)) and high-to-low (VT(HL)) as high as 15 % of the supply voltage. The power dissipation is 0.13 μW.

An ultra low voltage rail-to-rail DTMOS voltage follower

An ultra low voltage rail-to-rail DTMOS voltage follower is presented. The circuit is developed based on a complementary source follower with a common-source output stage. The circuit is designed using a 0.13 μm CMOS technology and SPICE is used to verify the circuit performance. The voltage follower can drive ± 0.25 V to the 500 Ω with the total harmonic distortion (THD) of 0.4% at the operating frequency of 1 MHz. The bandwidth and power dissipation are 288 MHz and 103 μW, respectively.

Low-voltage high gain, high CMRR and rail-to-rail bulk-driven Op-amp using feedforward technique

A low voltage fully differential CMOS Op-amp is presented in this paper. The input stage of the circuit is designed using bulk-driven transistors while the output stage are connected in the class AB operation using by QFG transistors techniques. The auxiliary transconductance feedforward circuit are employed to circuit operate high gain and high CMRR. The proposed amplifier is designed using 0.18 μm CMOS technology, and verify by HSPICE. The simulation results show rail-to-rail input and output swings. The open-loop gain and phase margin are 70.6 dB and 55°. Eventually, the gain-bandwidth product, the CMRR, and the power consumption are 31.7 MHz (CL=20 pF), 158.8 dB (at 1 kHz) and 220.35 μW, respectively.

A 1-V bulk-driven CMOS fully differential second-generation current conveyor

A 1-V fully differential second-generation current conveyer (FDCCII) is presented in this paper. The input stage of the circuit is designed using bulk-driven transistors in order to rail-to-rail operation. To increase DC gain, the feedforward circuits technique are employed in this design. The low voltage FDCCII is verified by using HSPICE in 0.18 μm CMOS technology. The simulation results show rail-to-rail input and output swing. The experimental and result shows the fully differential voltage Y-X DC transfer characteristic and fully differential current X-Z characteristic shows linearity. Finally, the bandwidth and power dissipation are 25.7 MHz (VX/VY), 30 MHz (IZ/IX) and 403.77 μW, respectively.

A 0.8 V quasi-floating-gate fully differential CMOS op-amp with positive feedback

This paper presents a 0.8 V fully differential CMOS op-amp. The input stage of the circuit is designed using quasi-floating-gate (QFG) transistors with positive feedback, while QFG transistors in the output stage are connected in the class AB configuration. QFG transistors are employed, enabling the circuit to operate under low supply voltage. The proposed amplifier is designed using 0.18 µm CMOS technology, and simulation results show rail-to-rail input and output swings. The open-loop gain is 80.4 dB with the gain-bandwidth product of 8.66 MHz. Phase margin is 45° (CL= 20 pF). The CMRR is 107 dB (at 1 kHz) and the power consumption is 54.9 µW.

Low-voltage CFOA with bulk-driven, quasi-floating-gate and bulk-driven-quasi-floating-gate MOS transistors

In this work, the low-voltage current feedback operational amplifier (CFOA) with bulk-driven, quasi-floating-gate (QFG) transistor and bulk-driven-quasi-floating-gate (QFG) transistor techniques to operate under low supply voltage is proposed. The proposed circuits were design based on the voltage follower and current follower while the output stages are designed base on the voltage follower. The CFOA circuits are designed by using the 0.18 μm CMOS technology and supply voltage operated 1 V. Simulation results shows output impedance of CFOA with bulk-driven, quasi-floating-gate (QFG) MOS transistor and bulk-driven-quasi-floating-gate (BD-QFG) MOS transistor are 55.72 ΩdB, 43.88 ΩdB, and 41.63 ΩdB, respectively. Finally, the proposed BD, QFG and BD-QFG MOS transistors techniques can used before the ultra-low voltage and low-power CFOA circuits.

A 0.8 V class-AB linear OTA using DTMOS for high-frequency applications

This paper presents a 0.8 V class-AB linear operational transconductance amplifier (OTA) using DTMOS for high-frequency applications. The circuit employs positive feedback to enhance the input impedance, and feed-forward technique to suppress the common-mode gain. The circuit is designed using 0.18 μm CMOS technology under 0.8 V supply. The simulation results show rail-to-rail input/output swing, suppressed common-mode response, and good linearity (less than −48 dB with input 0.6 Vpp, 5 MHz). The power dissipation is 155 μW.

A 0.5 V class AB quasi FGMOS pseudo fully differential CMOS op-amp with rail-to-rail input/output swing

This paper presents a 0.5 V pseudo fully differential CMOS op-amp with rail-to-rail input/output swing. The circuit is designed based on class AB input and output stages. In the design, quasi FGMOS transistors are employed. The proposed amplifier is designed using 0.18 μm CMOS technology, and the simulation results show rail-to-rail input and output swings. The open-loop gain and gain-bandwidth product show 73.3 dB and 12.6 MHz. The CMRR is 73.2 dB (at 1 kHz) and the power consumption is 27.9 μW.

A 0.5 volt rail-to-rail CMOS pseudo-differential OTA using simple feed-forward technique

This paper presents a low voltage CMOS pseudo differential OTA using simple feed-forward technique. The circuit employs feed-forward technique to suppress the common-mode gain, and positive feedback to enhance the output impedance. The circuit is designed using 0.18 µm CMOS technology under 0.5 V supply. The simulation results show rail-to-rail input/output swing, achieved with low common-mode gain (−35 dB). The output swing of the circuit is 0.3 Vpp. The power dissipation of the circuit is 50 µW.