Varakorn Kasemsuwan

High performance CMOS current-mode precision full-wave rectifier (PFWR)

This paper presents a high performance CMOS current-mode precision full-wave rectifier. The circuit operates under 3V supply voltage and is designed based on an improved Wilson current mirror. All MOS transistors are biased at low current resulting in small power dissipation. Negative feedback has been employed to reduce the input impedance of the circuit (236/spl Omega/). HSPICE is used to perform the simulation and the result shows the frequency of operation as high as 100 MHz with a standard 0.5 /spl mu/m CMOS technology. The mismatch obtained from the input and rectifiers output is 0.21% for an input current of /spl plusmn/150/spl mu/A. The DC transfer characteristic shows good linearity, very sharp corner at zero crossing point and good symmetry during positive and negative input cycle while power dissipation is 5.8/spl mu/W.

A /spl plusmn/ 1.5 V high frequency four quadrant current multiplier

This paper presents a four quadrant current multiplier based on the square-law characteristic of a MOS transistor operating in the saturation region. The current multiplier consists of four quadratic cells using only NMOS transistors. The circuit operates using the supply voltages of /spl plusmn/1.5 V and with the quiescent current of 25 /spl mu/A. The nonlinearity is 0.36% when the input current is the same as the bias current and reduced to only 0.1% when the input current is reduced by half. The cut-off frequency is 413 MHz with a total harmonic distortion less than 0.15% (at 1 MHz). The power dissipation is 0.45 mW.

A SIMPLE 1.5 V RAIL-TO-RAIL CMOS CURRENT CONVEYOR

A simple 1.5 V rail-to-rail CMOS current conveyor is presented. The circuit is developed based on a complementary source follower with a common-source output stage. The circuit is designed using a 0.13 μm CMOS technology and HSPICE is used to verify the circuit performance. The current conveyor exhibits low impedance at terminal X (7.2 Ω) and can drive ± 0.6 V to the 300 Ω with the total harmonic distortion of 0.55% at the operating frequency of 3 MHz. The voltage transfer error (between the Y and X terminals) and current transfer error (between the X and Y terminals) are small (-0.2 dB). The power dissipation and bandwidth are 532 μW and over 300 MHz, respectively.

Simple ± 0.75 Volt Rail-to-Rail Current Feedback Operational Amplifier and Its Application for Oscillator

Abstract – A simple rail-to-rail CMOS current feedback operational amplifier (CFOA) is presented. The circuit is developed based on a simple complementary source follower with a common-source output stage. The circuit is designed using a 0.13 μm CMOS technology and HSPICE is used to verify the circuit performance. The circuit operates under the supply of ± 0.75 Volt and can drive sinusoidal input of ± 0.5 Volt to a 300 Ω with the total harmonic distortion of less than 0.8 % at 1 MHz. The amplifier, configured for non-inverting gain of two and a 300 Ω load provides 3-dB bandwidth of 40 MHz. The rising slew rate (SR+) and falling slew rate (SR-), for a 300 Ω // 5 pF load are 257 V/μS and 464 V/μS, respectively. The power dissipation is 2.6 mW.

A ROBUST HIGH-SPEED LOW INPUT IMPEDANCE CMOS CURRENT COMPARATOR

In this paper, a robust high speed low input impedance CMOS current comparator is proposed. The circuit uses modified Wilson current-mirror to perform a current subtraction. Negative feedback is employed to reduce input impedances of the circuit. The diode connected transistors of the same type (NMOS) are used at the output making the circuit immune to the process variation. HSPICE is used to verify the circuit performance and the results show the propagation delay of 1.67 nsec with an average power dissipation of 0.63 mW using a standard 0.5 /spl mu/m CMOS technology for an input current of /spl plusmn/0.1 /spl mu/A at the supply voltage of 3 V. The input impedances of the proposed current comparator are 123 /spl Omega/ and 126 /spl Omega/ while the maximum output voltage variation is only 1.9%.

A Current-Mode Common-Mode Feedback Circuit (CMFB) with Rail-to-Rail Operation

Abstract This paper presents a current-mode common-mode feedback (CMFB) circuit with rail-to-rail operation. The CMFB is a stand-alone circuit, which can be connected to any low voltage transconductor without changing or upsetting the existing circuit. The proposed CMFB employs current mirrors, operating as common-mode detector and current amplifier to enhance the loop gain of the CMFB. The circuit employs positive feedback to enhance the output impedance and gain. The circuit has been designed using a 0.18 μm CMOS technology under 1V supply and analyzed using HSPICE with BSIM3V3 device models. A pseudo-differential amplifier using two common sources and the proposed CMFB shows rail to rail output swing (± 0.7 V) with low common-mode gain (–36 dB) and power dissipation of 390 μW.

ACMOS Thermal Noise-Canceling Transimpedance-Based Amplifier

This paper presents a design of 1.2 V thermal noise-canceling differential amplifier using 0.13 um CMOS technology. The circuit is designed based on a CMOS inverter-based transimpedance amplifier. Differential structure with tail current is employed to perform noise canceling of the input transistors. The simulation result shows noise figure (NF) of 2.3 dB. The gain and bandwidth of the amplifier are 42 dB and 2 GHz, respectively. The power dissipation is 13 mW. Index Terms – Transimpedance amplifier, CMOS inverter, Noise-canceling

A Fully Differential CMOS Transimpedance Amplifier for Optical Receiver

In this paper, a CMOS differential transimpedance amplifier is presented. The basic amplifier employs fT doubler and compensation capacitor techniques to enhance the bandwidth. The shunt-shunt feedback configuration is used to compromise between the wide bandwidth of the low impedance design and the low noise performance of the high impedance design. The phantom zero introduced by the feedback network is used to position the pole of the closed-loop system. HSPICE is used to verify the circuit performance with a 0.5 μm CMOS technology and a supply voltage of 2.5 V. Simulation results show the gain and -3 dB bandwidth of 80 dB and 2.4 GHz respectively. The equivalent input noise current is less than 18.4 / pA Hz within the amplifier frequency band and the total power dissipation is 23 mW. Index Terms – Transimpedance, amplifier, bandwidth

A 3 Gb/s 80 dB CMOS differential transimpedance amplifier for optical communication systems

In this paper, a 3 Gbit/s 80 dB differential CMOS transimpedance amplifier is proposed. The shunt-shunt feedback configuration is used to compromise between the wide bandwidth of the low impedance design and the low noise performance of the high impedance design. The basic amplifier employs f/sub T/ doubler and compensation capacitor techniques to enhance the bandwidth. The phantom zero introduced by the feedback network is used to position the pole in any desired region of the closed loop systems. HSPICE is used to verify the circuit performance with a standard 0.5 /spl mu/m CMOS technology and supply voltage of 2.5 V. Simulation results demonstrate the gain and the speed of operation of 80 dB and 3 Gb/s respectively. The equivalent input noise current spectral density is found to be 7.8 pA/(Hz) at 1 GHz and the total power dissipation is 58.4 mW.

A CMOS differential transimpedance amplifier for gigabit optical communication

In this paper, a CMOS differential transimpedance amplifier is presented. The basic amplifier employs fT doubler and compensation capacitor techniques to enhance the bandwidth. The shunt-shunt feedback configuration is used to compromise between the wide bandwidth of the low impedance design and the low noise performance of the high impedance design. The phantom zero introduced by the feedback network is used to position the pole in the desired region of the close loop systems. HSPICE is used to verify the circuit performance with a standard 0.5 mum CMOS technology and supply voltage of 2.5 V. Simulation results demonstrate the gain and the speed of operation of 80 dB and 3.25 Gb/s respectively. The equivalent input noise current spectral density is found to be 7.4 pAlradicHz at 1 GHz and the total power dissipation is 29.6 mW