Ashok K. Sinha
Applied Materials
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Featured researches published by Ashok K. Sinha.
Applied Physics Letters | 1994
M. Eizenberg; Karl A. Littau; Steve Ghanayem; Alfred Mak; Y. Maeda; Mei Chang; Ashok K. Sinha
High‐quality chemical vapor deposited TiCN films were produced in a single wafer reactor using a metallorganic (TDMAT) precursor. The films have excellent step coverage over high aspect‐ratio contacts as well as very low particle content. These properties are obtained because the films are deposited under surface‐reaction controlled conditions. The films show also excellent barrier properties against Al and WF6 attack. These properties make this material a superb contact barrier material for ultra‐large‐scale integrated devices.
Microelectronic Engineering | 1994
Israel Beinglass; Ashok K. Sinha
Abstract Solutions to problems encountered with todays methods for creating polycide structures are addressed with a multi-chamber single-wafer processing cluster tool.
Applied Physics Letters | 1993
Susan Telford; M. Eizenberg; Mei Chang; Ashok K. Sinha; T. R. Gow
High quality chemical vapor deposited (CVD) WSix (2.2<x<2.6) films were deposited on 200 mm Si wafers using SiH2Cl2/WF6 chemistry. Earlier reported problems regarding silicide nucleation at the substrate interface were solved resulting in a highly uniform composition (vertically and laterally) regardless of the substrate type (SiO2 or polycrystalline Si). As‐deposited resistivities of ∼750 μΩ cm were obtained for WSix (x=2.4–2.5) films grown at 550–600 °C. The films were completely crystalline, consisting predominantly of the hexagonal WSi2 phase. The as‐deposited stress in the films was ∼1.3×1010 dyne/cm2 and after 900 °C anneal has reduced to ∼8×109 dyne/cm2. The films contained relatively low levels of impurities: F∼6×1016–2×1017 atoms/cm3, and Cl∼5×1017–5×1018 atoms/cm3.
Microelectronics Technology and Process Integration | 1994
Karl A. Littau; Rod Mosely; M. Eizenberg; Hung V. Tran; Ashok K. Sinha; Girish A. Dixit; Manoj K. Jain; Michael Francis Chisholm; Robert H. Havemann
A new technique for low temperature CVD TiN is introduced as a barrier/glue layer for sub 0.5 micron applications. Excellent conformity (> 70%) is achieved while maintaining good electrical performance and reliability. The films are shown to be polycrystalline TiN with no preferred grain orientation. In addition compositional analysis shows significant amounts of carbon in the film presumably between the grains. The electrical properties of the CVD film were evaluated at the via and contact level. The contact and via resistances of tungsten plugs using CVD TiN glue layers are shown to be comparable to plugs using sputtered TiN. The barrier performance of the film was also evaluated at the contact level. The superior junction leakage data indicate that the CVD TiN film should have wide application as a barrier metal for sub 0.5 mm applications.
international symposium on quality electronic design | 2000
Ashok K. Sinha
Summary form only given, as follows. After more than thirty years of effectiveness, associated benefits to the electronics industry and several false alarms, it appears that Moores Law is again threatened with derailment. These threats are in the form of a convergence of three waves which requires major necessary changes relating to: a) lithography below 0.13 /spl mu/m, which involves printing and aligning at submicron wavelength dimensions with new unproven lasers/lens systems; b) Cu/low-/spl kappa/ interconnect technology, which is facing major challenges in achieving commercially viable yields; and c) 300 mm wafer size conversion, which requires an extensive retooling of the entire industry. These enabling changes are overlaid on increasingly aggressive cost/quality requirements on the semiconductor fabs as the electronics industry evolves into the post-PC, Internet era. The author reviews some of the cutting edge work being done in the semiconductor manufacturing equipment area, including extendability/reuse of existing installed base for multiple generations, improved BKMs (Best Known Methodologies) and integrated process modules.
MRS Proceedings | 1994
V.V.S. Rana; M. Eizenberg; S. Ghanayem; J. Roberts; Ashok K. Sinha
Chemical vapor deposition (CVD) of tungsten nucleation films is typically done using silane (SiH 4 ) reduction of tungsten hexafluoride (WF 6 ). For SiH 4 /WF 6 flow ratios of ≤ 1, pure tungsten of bulk density and resistivity is deposited. Upon increasing the ratio to 2, nearly 40 at.% Si is incorporated in tungsten films. At a ratio of 3, hexagonal WSi2 is deposited, and at ratios of > 6 WSi2 along with silicon is deposited. A maximum in deposition rate is obtained for WSi2 at the ratio of 3, and the deposition rate drops as more silicon is being deposited. The step coverage of films drops dramatically as one moves away from pure W films. The deposition of these films takes place without any incubation time.
Archive | 1996
Lawrence Chung-Lai Lei; Ilya Perlov; Karl A. Littau; Alan F. Morrison; Mei Chang; Ashok K. Sinha
Archive | 1996
Dan Maydan; Sasson Somekh; Ashok K. Sinha; Kevin Fairbairn; Christopher Lane; Kelly Colborne; Hari Ponnekanti; William N. Taylor
Archive | 1999
Robin Cheung; Ashok K. Sinha; Avi Tepman; Dan Carl
Archive | 2000
Moris Kori; Alfred Mak; Jeong Soo Byun; Lawrence Chung-Lai Lei; Hua Chung; Ashok K. Sinha; Ming Xi