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Featured researches published by Ayako Endo.


Optical Microlithography XVI | 2003

Rigorous simulation of exposure over nonplanar wafers

Andreas Erdmann; Christian K. Kalus; Thomas Schmoeller; Yewgenija Klyonova; Takashi Sato; Ayako Endo; Tsuyoshi Shibata; Yuuji Kobayashi

Standard simulations of optical projection systems for lithography with scalar or vector methods of Fourier optics make the assumption that the wafer stack consists of homogeneous layers. We introduce a general scheme for the rigorous electromagnetic field (EMF) simulation of lithographic exposures over non-planar wafers. Rigorous EMF simulations are performed with the finite-difference time-domain (FDTD) method. The described method is used to simulate several typical scenarios for lithographic exposures over non-planar wafers. This includes the exposure of resist lines over a poly-Si line on the wafer with orthogonal orientation, the simulation of “classical” notch problems, and the simulation of lithographic exposures over wafers with defects.


Journal of Micro-nanolithography Mems and Moems | 2005

Alignment mark signal simulation system for the optimum mark feature selection

Takashi Sato; Ayako Endo; Tatsuhiko Higashiki; Kazutaka Ishigo; Takuya Kono; Takashi Sakamoto; Yoshiyuki Shioyama; Satoshi Tanaka

Recently, requirements concerning overlay accuracy have become much more restrictive. For the accurate overlay, signal intensity and wave form from the topographical alignment mark have been examined by signal simulation. However, even if the results were in good agreement with actual signal profiles, it would be difficult to select particular alignment marks at each mask level by the signal simulation. Therefore, many mark candidates are left in the kerf area after mass production. To facilitate the selection, we propose a mark TCAD system. It is a useful system for the mark selection with the signal simulation performed in advance. In our system, the alignment mark signal can be easily simulated after input of some process material parameters and process of record (POR). The POR is read into the system and a process simulator makes stacked films on a wafer. Topographical marks are simulated from the stacked films and the resist pattern. The topographical marks are illuminated and reflected beams are produced. Imaging of the reflected beams through inspection optics is simulated. In addition, we show two applications. This system is not only for predicting and showing a signal wave form, but is also helpful for finding the optimum marks.


Journal of Micro-nanolithography Mems and Moems | 2006

Impact of polarization on an attenuated phase shift mask with ArF hyper-numerical aperture lithography

Takashi Sato; Ayako Endo; Akiko Mimotogi; Shoji Mimotogi; Kazuya Sato; Satoshi Tanaka

In recent low-k1 lithography, the size of a mask pattern is becoming close to the wavelength of the light source. In a sub-100-nm pattern at wafer scale of 4× masks, transverse electric (TE) polarization light had higher transmittance of the zeroth order than TM polarization for a Cr mask according to rigorous model simulation of a finite difference time domain method. On the other hand, transverse magnetic (TM) polarization light had higher transmittance than TE polarization light for a MoSi mask. From the results of lithography simulation for a 45-nm pattern on the MoSi mask, TE polarization was better for wide exposure latitude, but TM polarization was better for large depth of field. The performance of a current MoSi mask is inferior to that of a Cr mask. However, a lower transmittance MoSi mask has better performance in the exposure defocus window under the dipole illumination. Also, rigorous simulation showed transmittance dependency of the light incident angle to the MoSi mask. The dependency was larger for TM polarization than for TE polarization.


Optical Microlithography XVII | 2004

Approach for reducing resist footing over nonplanar wafer

Ayako Endo; Takashi Sato; Masafumi Asano; Shoji Mimotogi; Soichi Inoue

We have studied the lithography issue of resist footing in an ion implant layer after a gate conductor formation. In a previous report , we proposed the shadow model and showed a solution to reduce the resist footing. This paper reports on the further investigation into the cause and the reduction method of the resist footing over non-planar wafer with simulation and explains the effects with the shadow model. We analyzed the processes that affected the resist footing and four main effects were selected. These were NA, illumination coherency, mask bias, and mask type. We simulated these four effects on an orthogonal array by using the design of experiments (DOE). We obtained a better condition of higher NA, smaller coherency, positive mask bias, and Att-PSM for reducing the resist footing. We explain the reasons for these effective factors with the shadow model.


Japanese Journal of Applied Physics | 2006

Characterization of 45 nm Attenuated Phase Shift Mask Lithography with a Hyper Numerical Aperture ArF Tool

Takashi Sato; Ayako Endo; Akiko Mimotogi; Shoji Mimotogi; Kazuya Sato; Satoshi Tanaka

In the 45 nm half pitch node, a mask induced polarization effect appears. Because of this effect, intensity of diffracted light depends on a pattern size and a diffraction order. This is pronounced in an attenuated phase shift mask (attPSM). A mask topography effect has to be considered for rigorous simulation. A small window attributable to diffraction efficiency is generated, because of an insufficient ratio of 1st order and 0th order diffracted light from the attPSM. Two approaches to produce a sufficient ratio, namely, a low transmittance layer attPSM and a biased pattern attPSM, were investigated by simulation. A mask bias of more than 10 nm on both sides is required to generate an optimal diffraction efficiency ratio for the 0th and 1st orders. The low transmittance (around 1%) attPSM had higher contrast at 45 nm half pitch in the resist image than the biased attPSM. It was also shown that a phase difference between diffraction orders caused lower contrast imaging.


Optical Microlithography XVIII | 2005

Impact of polarization for an attenuated phase shift mask with ArF hyper-NA lithography

Takashi Sato; Ayako Endo; Akiko Mimotogi; Shoji Mimotogi; Kazuya Sato; Satoshi Tanaka

In recent low-k1 lithography, the size of a mask pattern is becoming close to wavelength of the light source. The light intensity through the mask pattern is depending on polarization. TM polarization light is higher transmission than TE polarization light for a MoSi mask. This effect influences not only the zeroth-order light but the first-order light. On the other hand, TE polarization imaging makes higher contrast than TM polarization in two beam interference. Effects of polarization to resolution are not simple. Since an attenuated phase shift mask is used in order to obtain high contrast, it is necessary to take into consideration the influence of that. It is also taken into consideration that illumination light is not perpendicular incidence but oblique incidence for an ArF hyper-NA tool. We will perform a rigorous simulation in consideration of the above conditions. Hereby influence of the to the utmost resolution will be clarified by the rigorous simulation.


Optical Microlithography XVI | 2003

Resist footing variation and compensation over nonplanar wafer

Takashi Sato; Ayako Endo; Kohji Hashimoto; Soichi Inoue; Tsuyoshi Shibata; Yuuji Kobayashi

This paper reports a problem regarding DUV lithography on topographical substrate and solution for obtaining desired CD control and resist pattern shape. In our experiment, large footing for 250 nm resist pattern was observed when the resist pattern was transferred over polysilicon step pattern of 175nm in height. This pattern error is not negligible regarding device performance. The exposure tool used was a KrF scanner of NA0.6. Resist was 500 nm thick with no ARC. Computer simulation was used to demonstrate the amount of footing. A non-rigorous diffraction model did not recreate the footing appearance at the poly-Si step. However, a rigorous diffraction model of incident light in a cone recreated the footing amount at the poly-Si step faithfully. In this simulation, optical distribution in the resist over the nonplaner wafer was solved by the FDTD method. Optical intensity at sidewall of the step differs between the two models. Experimental results as well as simulation results showed that the amount of the footing depended on a coherency factor of illumination. Larger coherency resulted in larger footing. In the case of a large coherency the illumination rays come from various directions to the wafer, and a large shadow area is likely to appear behind the steep step. As a consequence, optical behavior in the vicinity at the steep step has a strong impact on the resist footing.


international microprocesses and nanotechnology conference | 2005

Characterization of 45 nm att-PSM lithography with a hyper-NA ArF tool

Takashi Sato; Ayako Endo; Akiko Mimotogi; Shoji Mimotogi; Kazuya Sato; Satoshi Tanaka

In the 45 nm half pitch node, a mask induced polarization effect is appeared. Also, this effect depends on optical diffraction orders. This is notable in an attenuated phase shift mask (att-PSM) rather than in a Cr binary mask (BIM). Diffraction efficiency is also different between dense patterns and larger pitch patterns. In lithography simulation, we have to use a rigorous method and to consider mask topology. With the rigorous method, focus tilt effect depending on mask pitch has been reported (Erdmann, 2005). Also, it has been reported that transmittance of att-PSM should be changed for 45 nm half pitch pattern (Sato et al., 2005). In this report, the authors investigate detailed characterization of the 45 nm att-PSM lithography with lithography simulation. In addition, we discuss impact of the focus tilt for ED-window and other characterization of the 45 nm att-PSM.


symposium on vlsi technology | 2003

ArF lithography technologies for 65 nm-node CMOS (CMOS5) with 30 nm logic gate and high density embedded memories

Kohji Hashimoto; Fumikatsu Uesawa; Kazuhiro Takahata; Koji Kikuchi; Hideki Kanai; Hideo Shimizu; Eishi Shiobara; Koichi Takeuchi; Ayako Endo; Hideaki Harakawa; Shoji Mimotogi

In this paper ArF lithography technology for 65nm-node CMOS with 30nm logic gate and high density embedded memories have been demonstrated. ArF step-and-scan exposure systems with 0.75NA are available under accurate lithography design with level specific focus and does error budgets. Also,the process steps with two kinds of lithography are implemented to fabricate GC pattern.


Archive | 2009

Process controller for semiconductor manufacturing, utilizing dangerous pattern identification and process capability determination

Ayako Endo; Kenji Yoshida; Toshiya Kotani; Satoshi Tanaka

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