B.J. Blalock

Evaluation of SiC MOSFETs for a high efficiency three-phase buck rectifier

This paper presents the characteristics of a 1200 V, 33 A SiC MOSFET and a 1200 V, 60 A SiC schottky barrier diode (SBD). The switching characteristics of the devices are tested by a double pulse test (DPT) based on a current-source structure at voltage levels up to 680 V and current up to 20 A. In addition, based on these devices, a 7.5 kW, three-phase buck rectifier for a 400 Vdc architecture data center power supply is designed. The total loss of this rectifier is calculated full load. The results show that the SiC based buck rectifier can obtain low power loss and smaller weight and volume than a Si based rectifier.

A new approach to designing electronic systems for operation in extreme environments: Part I - The SiGe Remote Sensor Interface

We have described the modeling, circuit design, system integration, and measurement of a Remote Sensor Interface (Figure 20) that took place over a span of 5 years and 8 fabrication cycles. It was conceived as part of the Multi-Chip Module (MCM) shown in Figure 21, which also includes a digital control chip for clocking, programming, and read-out. Further work beyond the scope of this was performed to validate the RSI for the extreme environmental conditions of a lunar mission, and individual blocks are presently.

A novel four-quadrant analog multiplier using SOI four-gate transistors (G/sup 4/-FETs)

A novel analog multiplier using SOI four-gate transistors (G/sup 4/-FETs) is presented. Thanks to the multiple inputs of the G/sup 4/-FET that may be biased independently, the number of transistors in the proposed circuit is dramatically reduced, compared to conventional single-gate MOSFET based multipliers. Only four G/sup 4/-FETs are needed to build the multiplier core. The circuit is feasible with a standard SOI CMOS process. Two different configurations, both based on the linear modulation of the front-gate threshold voltage by the junction-gates, are presented. This paper addresses the theoretical analysis as well as the preliminary measurement results.

Temperature-compensated reference circuits for SOI

Two novel reference circuits that exploit unique aspects of SOI technology are reported. The first is a voltage reference based on the G/sup 4/-FET, a new four-gate transistor possible only in SOI; which achieves a temperature-compensated output voltage without the use of the standard bandgap architecture. The second is a current reference that uses the zero leakage p-well resistor available in many SOI technologies to achieve a low-level, temperature-stable reference current that exceeds the specifications of bulk CMOS low-level current references reported in the literature. Both reference circuits have been implemented in a standard 3.3-V/0.35-/spl mu/m partially depleted (PD)-SOI process.

Depletion-all-around in SOI G/sup 4/-FETs: a conduction mechanism with high performance

Only in 4-gate SOI transistors (G/sup 4/-FETs) can the channel be surrounded by depletion regions induced by independent vertical MOS gates and lateral JFET gates. The majority carriers flow in the film volume, far from interfaces and junctions. We show that inversion layers, formed at the front and back interface, enable the junction gates to have enhanced control on the volume channel. High performance is experimentally demonstrated in terms of transconductance, subthreshold swing and g/sub m//I/sub d/ ratio. The basic mechanism, which involves a specific 2D gate coupling, is explained with a simple analytical model and simulations.

SiC based current source rectifier paralleling and circulating current suppression

This paper develops a liquid cooled high efficiency three-phase current source rectifier (CSR) for data center power supplies based on 400 Vdc architecture, using SiC MOSFETs and Schottky diodes. The 98.54% efficiency is achieved at full load. The rectifiers are paralleled to achieve high power ratings and system redundancy. The current balance and hot-swap of paralleled CSRs are realized in simulation using master-slave control. Moreover, an improved modulation scheme through adjustment of the freewheeling state is proposed and verified to effectively suppress the circulating current.

SOI four-gate transistors (G/sup 4/-FETs) for high voltage analog applications

A new approach for high-voltage analog applications that utilizes SOI four-gate transistors (G/sup 4/-FETs) is presented. The proposed solution achieves high-voltage operation (10 V and higher) with no additional cost of fabrication (compatible with standard SOI) and minimal added design overhead compared to their MOSFET counterparts. Measurement results of high-voltage current mirrors and differential pairs show superior HV capability with small signal performance comparable to their MOSFET counterparts. By using the high-voltage current mirror and differential pair as basic building blocks, a differential amplifier is built and tested with a 20 V supply.

DC-link current control scheme for paralleled three-phase current source rectifiers in high efficiency power supply system

Three-phase current source rectifier (CSR) is a promising solution for power supply systems as the buck-type power factor correction converter. By converter paralleling, high power rating and system redundancy can be achieved. However, asymmetrical distribution of load current among converter modules may occur, which can increase power loss or even damage devices. This paper presents the DC-link current control scheme for paralleled current source rectifiers to balance the output currents. Using a master-slave control, the balanced output current distribution and system redundancy are implemented. By correcting zero state duration based on modulation scheme, the circulating current is suppressed without introducing additional power losses, and both positive and negative DC-link currents are balanced.

SOI Based Voltage Regulator for High-Temperature Applications

Developments in automotive (particularly hybrid-electric vehicles), aerospace, and energy production industries have led to expanding research interest in integrated circuit (IC) design toward high-temperature applications. A high-voltage, high-temperature silicon-on-insulator (SOI) process allows for circuit design to expand into these extreme environment applications. Nearly all electronic devices require a reliable supply voltage capable of operating under various supply voltages and load currents. These supply voltages and load currents can be either DC or time-varying signals. In this work, a stable supply voltage for embedded circuits is generated on chip via a voltage regulator producing a stable 5-V output voltage. Although applications of this voltage regulator are not limited to gate driver circuits, this regulator has been developed to meet the demands of a gate driver IC. The voltage regulator must be able to provide reliable output voltage over an input range from 10 V to 30 V, a temperature ...

SOI-Based Integrated Gate Driver Circuit for High-Temperature Applications

The growing demand for hybrid electric vehicles (HEVs) has increased the need for high-temperature electronics that can operate at the temperatures that exist under the hood of these vehicles. In many cases this requires the use of thermal management systems to allow for the use of components not designed to operate at the ambient temperatures found in the engine compartment of an HEV. These systems add weight and complexity, which can increase the overall cost and reduce the efficiency of the vehicle. The alternative is to develop circuits and systems capable of operating with reduced or no thermal management. To this end, the latest version of our high-temperature gate driver integrated circuit (IC) has been developed. Designed and implemented on a 0.8-micron bipolar-CMOS-DMOS (BCD) on silicon-on-insulator (SOI) process, this gate driver chip is intended to drive silicon carbide (SiC) and other wide-bandgap (WBG) power field-effect transistors (FETs) for DC-DC converters and traction drives in HEVs. To ...