Bahman Hekmatshoar

Kerf-Less Removal of Si, Ge, and III–V Layers by Controlled Spalling to Enable Low-Cost PV Technologies

Kerf-less removal of surface layers of photovoltaic materials including silicon, germanium, and III-Vs is demonstrated by controlled spalling technology. The method is extremely simple, versatile, and applicable to a wide range of substrates. Controlled spalling technology requires a stressor layer, such as Ni, to be deposited on the surface of a brittle material, and the controlled removal of a continuous surface layer could be performed at a predetermined depth by manipulating the thickness and stress of the Ni layer. Because the entire process is at room temperature, this technique can be applied to kerf-free ingot dicing, removal of preformed p-n junctions or epitaxial layers, or even completed devices. We successfully demonstrate kerf-free ingot dicing, as well as the removal of III-V single-junction epitaxial layers from a Ge substrate. Solar cells formed on the spalled and transferred single-junction layers showed similar characteristics to nonspalled (bulk) cells, indicating that the quality of the epitaxial layers is not compromised as a result of spalling.

High-efficiency thin-film InGaP/InGaAs/Ge tandem solar cells enabled by controlled spalling technology

In this letter, we demonstrate the effectiveness of the controlled spalling technology for producing high-efficiency (28.7%) thin-film InGaP/(In)GaAs/Ge tandem solar cells. The controlled spalling technique was employed to separate the as-grown solar cell structure from the host Ge wafer followed by its transfer to an arbitrary Si support substrate. The structural and electrical properties of the thin-film tandem cells were examined and compared against those on the original bulk Ge substrate. The comparison of the electrical data suggests the equivalency in cell parameters for both the thin-film (spalled) and bulk (non-spalled) cells, confirming that the controlled spalling technology does maintain the integrity of all layers in such an elaborate solar cell structure.

Characterization of thin epitaxial emitters for high-efficiency silicon heterojunction solar cells

We report silicon heterojunction solar cells with conversion efficiencies exceeding 21% using appropriately designed emitter structures comprised of highly doped thin epitaxial layers grown by plasma-enhanced chemical vapor deposition at temperatures close to 200 °C. We show that at a given doping concentration, there is an optimum epitaxial layer thickness, above which the conversion efficiency is limited by Auger recombination and bandgap narrowing within the epitaxial layer. In contrast, below the optimum thickness, the conversion efficiency is limited by carrier recombination at the emitter surface of the crystalline silicon substrate.

Thin-film tunneling transistors on flexible plastic substrates based on stress-assisted lateral growth of polycrystalline germanium

Stress-assisted Cu-induced lateral growth of polycrystalline germanium (poly-Ge) at temperatures as low as 150 °C has been exploited to fabricate thin-film tunneling transistors on flexible plastic substrates. Applying external compressive stress during annealing, leads to the lateral growth of poly-Ge from Cu-seeded drain/source regions, progressing into the channel area. A potential barrier is formed midway in the channel where the two lateral growth frontiers, emanating from source and drain seeded areas, meet each other. As confirmed by electrical measurements, the barrier is controlled by the gate bias. An ON/OFF ratio of 104 has been measured for these transistors, which shows the potential of these devices for switching applications.

Novel heterojunction solar cells with conversion efficiencies approaching 21% on p-type crystalline silicon substrates

We report novel high-efficiency heterojunction (HJ) solar cells with Engineered Low-bandgap Interlayer and Thin Epitaxial emitter (ELITE) structure, achieving a record conversion efficiency of 20.7% on p-type crystalline Si (c-Si) substrates. Cell fabrication is based on plasma-enhanced chemical vapor deposition (PECVD) of contact layers at temperatures below 200°C and room-temperature sputtering of low-cost Al-doped zinc-oxide (ZnO:Al) electrodes.

Low temperature crystallization of germanium on plastic by externally applied compressive stress

The conventional Cu-induced crystallization of a-Ge has been facilitated by different types of external stress mechanically applied to the flexible substrate. It has been observed that in the case of compressive stress, crystallization becomes possible at temperatures as low as 130 °C and evolves as stress becomes more stringent. High electrical conductance and a hole mobility of 110 cm2/V s show the crystallinity of the Ge film, further confirmed by x-ray diffraction, scanning electron microscopy, and transmission electron microscopy analyses. The temperature of the annealing process (between 130 and 180 °C) expedites the process (from 6 to 1 h) as it is increased, but the principal mechanism seems to be independent of temperature. Temperatures higher than 180 °C are detrimental to the plastic substrate, polyethylene terephthalate. Evolution of cracks in Ge layer has been studied as the main consequence of the interfacial stress between Ge layer and substrate. The crack density was minimized by patternin...

Thin-Film Heterojunction Field-Effect Transistors With Crystalline Si Channels and Low-Temperature PECVD Contacts

Heterojunction field-effect transistor devices with thin-film crystalline silicon channels and gate, source, and drain contacts formed by plasma-enhanced chemical vapor deposition (PECVD) at temperatures <;200 °C have been demonstrated. The gate and source/drain contacts are comprised of hydrogenated amorphous silicon and crystalline silicon, respectively; both grown in the same PECVD reactor. An ON/OFF ratio of >106, pinch-off voltage of approximately -0.6 V, turn-on slope of ~70 mV/decade, and off-current of ~25 fA/μm have been achieved at process temperatures <;200 °C.

Low-temperature copper-induced lateral growth of polycrystalline germanium assisted by external compressive stress

Copper-induced lateral growth of polycrystalline germanium (poly-Ge) at temperatures as low as 150°C was enabled by the application of an external mechanical stress during the annealing step of sample processing. An equivalent compressive strain of 0.05% was externally applied at 150°C for 10h to a deposited amorphous Ge layer and crystalline growth rates of 2.5 and 1.8μm∕h were observed in directions parallel and perpendicular to the stress axis, respectively. These results were confirmed by scanning electron microscope and transmission electron microscopy (TEM) analyses. In addition, TEM and x-ray diffraction analyses indicate that a fraction of poly-Ge annealed in the presence of applied compressive stress possessed a tetragonal structure with space-group P43212. The presence of the tetragonal phase is hypothesized to be the primary mechanism responsible for the lateral growth of poly-Ge.

Advanced flexible electronics: challenges and opportunities

Thin, lightweight and flexible electronics are being regarded as an important evolutionary step in the development of novel technological products. Interestingly, this trend has emerged in a wide range of industries; from microelectronics to photovoltaics and even solid state lighting. Historically, most attempts to enable flexibility have focused on the introduction of new material systems that, so far, severely compromise the performance compared to state-of-the-art products. The few approaches that do attempt to render contemporary high-performance materials flexible rely on layer transfer techniques that are complicated, expensive and material-specific. In this paper, we review a method of removing surface layers from brittle substrates called Controlled Spalling Technology that allows one to simple peel material or device layers from their host substrate after they have been fabricated. This allows one to fabricate high-performance electronic products in a manner of their choosing, and make them flexible afterwards. This technique is simple, inexpensive and largely independent of substrate material or size. We demonstrate the power and generality of Controlled Spalling by application to a number of disparate applications including high-performance integrated circuits, high-efficiency photovoltaics and GaN-based solid state lighting.

Fabrication of poly-Ge-based thermopiles on plastic

Fabrication of Ge-based thermocouple on polyethylene-terephthalate (PET) plastic substrates is reported. The amorphous Ge film, deposited using electron beam evaporation, is post treated to form a polycrystalline film. The annealing process has been performed at temperatures ranging from 120/spl deg/C to 175/spl deg/C and study of physical characteristics of Ge films using XRD and SEM confirms its crystallinity. A value of 100 /spl mu/V//spl deg/C is extracted for the Ge-Al junctions. The thermocouple fabrication and its response to flow are reported. A novel approach is described to perform the micromachining of PET substrates for the formation of craters and membranes. Di-methyl-formamide (DMF) is used as the solvent of the PET substrate, masked with a Ge/Cu multilayer. An average chemical etch rate of 12 /spl mu/m/h is achieved in the presence of 6.5 mW/cm/sup 2/ of 360-nm UV at ambient temperature.