Bart Moeneclaey

A 40-Gb/s Transimpedance Amplifier for Optical Links

This letter presents a low-power transimpedance amplifier (TIA), supporting both 25 and 40-Gb/s communication. It exhibits an optical modulation amplitude sensitivity of -10.6 dBm at 25 Gb/s and -6.4 dBm at 40 Gb/s using a photodiode with a responsivity of 0.55 A/W. The TIA consumes 158 mW from a 2.5 V supply and was manufactured in a 0.13-μm SiGe BiCMOS process. Compared with the state of the art, the presented TIA exhibits a similar sensitivity (at both 25 and 40 Gb/s), while exhibiting a low power consumption for the 40-Gb/s operation.

Fast Synchronization 3R Burst-Mode Receivers for Passive Optical Networks

This paper gives a tutorial overview on high speed burst-mode receiver (BM-RX) requirements, specific for time division multiplexing passive optical networks, and design issues of such BM-RXs as well as their advanced design techniques. It focuses on how to design BM-RXs with short burst overhead for fast synchronization. We present design principles and circuit architectures of various types of burst-mode transimpedance amplifiers, burst-mode limiting amplifiers and burst-mode clock and data recovery circuits. The recent development of 10 Gb/s BM-RXs is highlighted also including dual-rate operation for coexistence with deployed PONs and on-chip auto reset generation to eliminate external timing-critical control signals provided by a PON medium access control. Finally sub-system integration and state-of-the-art system performance for 10 Gb/s PONs are reviewed.

A 64 Gb/s PAM-4 linear optical receiver

We present a linear optical receiver realized on 130 nm SiGe BiCMOS. Error-free operation assuming FEC is shown at bitrates up to 64 Gb/s (32 Gbaud) with 165mW power consumption, corresponding to 2.578 pJ/bit.

Compact Low-Power-Consumption 28-Gbaud QPSK/16-QAM Integrated Silicon Photonic/Electronic Coherent Receiver

We demonstrate the codesign and cointegration of an ultracompact silicon photonic receiver and a low-power-consumption (155 mW/channel) two-channel linear transimpedance amplifier array. Operation below the forward error coding (FEC) threshold both for quadrature phase-shift keying (QPSK) and 16-quadrature amplitude modulation (QAM) at 28 Gbaud is demonstrated.

Multichannel 25 Gb/s Low-Power Driver and Transimpedance Amplifier Integrated Circuits for 100 Gb/s Optical Links

Highly integrated electronic driver and receiver ICs with low-power consumption are essential for the development of cost-effective multichannel fiber-optic transceivers with small form factor. This paper presents the latest results of a two-channel 28 Gb/s driver array for optical duobinary modulation and a four-channel 25 Gb/s TIA array suited for both NRZ and optical duobinary detection. This paper demonstrated that 28 Gb/s duobinary signals can be efficiently generated on chip with a delay-and-add digital filter and that the driver power consumption can be significantly reduced by optimizing the drive impedance well above 50 Ω, without degrading the signal quality. To the best of our knowledge, this is the fastest modulator driver with on-chip duobinary encoding and precoding, consuming only 652 mW per channel at a differential output swing of 6 Vpp. The 4 × 25 Gb/s TIA shows a good sensitivity of -10.3 dBm average optical input power at 25 Gb/s for PRBS 231-1 and low power consumption of 77 mW per channel. Both ICs were developed in a 130 nm SiGe BiCMOS process.

An asymmetric high serial rate TDM-PON with single carrier 25 Gb/s upstream and 50 Gb/s downstream

We report a 2:1 rate asymmetric high serial rate time division multiplexing passive optical network (TDM-PON) with single carrier 25 Gb/s upstream and 50 Gb/s downstream. In the upstream, we present a first 25 Gb/s three-level modulated burstmode receiver employing a 1/4-rate linear burst-mode avalanch photodiode transimpedance amplifier and a custom decoder IC. We successfully demonstrated burst-mode sensitivity of -20.4 dBm with 18 dB dynamic burst-to-burst for 25 Gb/s upstream links. In another direction, a downstream in upper O-band is proposed and demonstrated with three-level duo-binary modulation at 50 Gb/s in real time. The upstream and downstream transmission experiments show that the proposed asymmetric 50 G/25 G high serial rate TDM-PON can support ≥32 users while covering more than 20 km reach.

A 10Gb/s APD-based linear burst-mode receiver with 31dB dynamic range for reach-extended PON systems.

We present a first high performance APD-based linear burst-mode receiver (BM-RX) with a record wide dynamic range of 31dB. The APD multiplication factor is controlled from burst to burst within 60ns by an on-chip self-generated M-control signal.

A 40-GBd QPSK/16-QAM integrated silicon coherent receiver

Through co-design of a dual SiGe transimpedance amplifier and an integrated silicon photonic circuit, we realized for the first time an ultra-compact and low-power silicon single-polarization coherent receiver operating at 40 GBd. A bit-error rate of <;3.8 × 10-3 was obtained for an optical signal-to-noise ratio of 14 dB for QPSK modulation (80 Gb/s), and 26.5 dB for 16-QAM (160 Gb/s). We also demonstrate robust performance of the receiver over temperature and wavelength.

25-Gb/s 1310-nm Optical Receiver Based on a Sub-5-V Waveguide-Coupled Germanium Avalanche Photodiode

We demonstrate low-voltage waveguide-coupled germanium avalanche photodetectors (APDs) with a (wafer-scale mean) gain×bandwidth product of 140 GHz at -5 V by utilizing a 185-nm-thick Ge layer. An optical receiver based on such an APD operating up to 25 Gb/s is demonstrated.

Implementation of the dissection theorem in cadence virtuoso

This paper describes a tool for the Cadence Virtuoso software that implements the Dissection Theorem (DT) or General Network Theorem (GNT) and its applications: the Extra Element Theorem (EET), Chain Theorem (CT) and General Feedback Theorem (GFT). The tool allows a circuit designer to gain additional circuit insight by providing all second- and third-level transfer functions of the DT. In particular, feedback networks are factored into their exact components, enabling a deeper insight into the structure of the loop gain, direct forward transmission and hence closed-loop behaviour.