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Publication
Featured researches published by Basanth Jagannathan.
IEEE Electron Device Letters | 2002
Basanth Jagannathan; Marwan H. Khater; Francois Pagette; Jae Sung Rieh; David Angell; Huajie Chen; J. Florkey; F. Golan; David R. Greenberg; R. Groves; S.-J. Jeng; Jeffrey B. Johnson; E. Mengistu; Kathryn T. Schonenberg; C.M. Schnabel; P. Smith; Andreas D. Stricker; David C. Ahlgren; G. Freeman; Kenneth J. Stein; Seshadri Subbanna
This paper reports on SiGe NPN HBTs with unity gain cutoff frequency (f/sub T/) of 207 GHz and an f/sub MAX/ extrapolated from Masons unilateral gain of 285 GHz. f/sub MAX/ extrapolated from maximum available gain is 194 GHz. Transistors sized 0.12/spl times/2.5 /spl mu/m/sup 2/ have these characteristics at a linear current of 1.0 mA//spl mu/m (8.3 mA//spl mu/m/sup 2/). Smaller transistors (0.12/spl times/0.5 /spl mu/m/sup 2/) have an f/sub T/ of 180 GHz at 800 /spl mu/A current. The devices have a pinched base sheet resistance of 2.5 k/spl Omega//sq. and an open-base breakdown voltage BV/sub CEO/ of 1.7 V. The improved performance is a result of a new self-aligned device structure that minimizes parasitic resistance and capacitance without affecting f/sub T/ at small lateral dimensions.
international electron devices meeting | 2002
Jae Sung Rieh; Basanth Jagannathan; H.-C. Chen; Kathryn T. Schonenberg; David Angell; Anil K. Chinthakindi; J. Florkey; F. Golan; David R. Greenberg; S.-J. Jeng; Marwan H. Khater; Francois Pagette; Christopher M. Schnabel; P. Smith; Andreas D. Stricker; K. Vaed; Richard P. Volant; David C. Ahlgren; G. Freeman; Kenneth J. Stein; Seshadri Subbanna
This work reports on SiGe HBTs with f/sub T/ of 350 GHz. This is the highest reported f/sub T/ for any Si-based transistor as well as any bipolar transistor. Associated f/sub max/ is 170 GHz, and BV/sub CEO/ and BV/sub CBO/ are measured to be 1.4 V and 5.0 V, respectively. Also achieved was the simultaneous optimization of f/sub T/ and f/sub max/ resulting in 270 GHz and 260 GHz, with BV/sub CEO/ and BV/sub CBO/ of 1.6 V and 5.5 V, respectively. The dependence of device performance on bias condition and device dimension has been investigated. Considerations regarding the extraction of such high f/sub T/ and f/sub max/ values are also discussed.
international electron devices meeting | 2007
Sungjae Lee; Basanth Jagannathan; Shreesh Narasimha; Anthony I. Chou; Noah Zamdmer; J. Johnson; Richard Q. Williams; Lawrence Wagner; Jonghae Kim; Jean-Olivier Plouchart; John J. Pekarik; Scott K. Springer; Greg Freeman
We report record RF performance in 45-nm silicon-on- insulator (SOI) CMOS technology. RF performance scaling with channel length and layout optimization is demonstrated. Peak fTs of 485 GHz and 345 GHz are measured in floating- body NFET and PFET with nearby wiring parasitics (i.e., gate- to-contact capacitance) included after de-embedding, thus representing FET performance in a real design. The measured fTs are the highest ever reported in a CMOS technology. Body- contacted FETs are also analyzed that have layout optimized for high-frequency analog applications. Employing a notched body contact layout, we reduce parasitic capacitance and gate leakage current significantly, thus improving RF performance with low power. For longer than minimum channel length and a body-contacted NFET with notched layout, we measure a peak fT of 245 GHz with no degradation in critical analog figures of merit, such as self-gain.
bipolar/bicmos circuits and technology meeting | 2001
Alvin J. Joseph; D. Coolbaugh; Michael J. Zierak; R. Wuthrich; Peter J. Geiss; Zhong-Xiang He; Xuefeng Liu; Bradley A. Orner; Jeffrey B. Johnson; G. Freeman; David C. Ahlgren; Basanth Jagannathan; Louis D. Lanzerotti; John C. Malinowski; Huajie Chen; J. Chu; Peter B. Gray; Robb Allen Johnson; James S. Dunn; Seshadri Subbanna; Kathryn T. Schonenberg; David L. Harame; R. Groves; K. Watson; D. Jadus; M. Meghelli; A. Rylyakov
A BiCMOS technology is presented that integrates a high performance NPN (f/sub T/=120 GHz and f/sub max/=100 GHz), ASIC compatible 0.11 /spl mu/m L/sub eff/ CMOS, and a full suite of passive elements. Significant HBT performance enhancement compared to previously published results has been achieved through further collector and base profile optimization guided by process and device simulations. Base transit time reduction was achieved by simultaneously increasing the Ge ramp and by limiting the base diffusion with the addition of carbon doping to SiGe epitaxial base. This paper describes IBMs next generation SiGe BiCMOS production technology targeted at the communications market.
IEEE Electron Device Letters | 2001
S.-J. Jeng; Basanth Jagannathan; Jae Sung Rieh; Jeffrey B. Johnson; Kathryn T. Schonenberg; David R. Greenberg; Andreas D. Stricker; Huajie Chen; Marwan H. Khater; David C. Ahlgren; G. Freeman; Kenneth J. Stein; Seshadri Subbanna
A record 210-GHz f/sub T/ SiGe heterojunction bipolar transistor at a collector current density of 6-9 mA//spl mu/m/sup 2/ is fabricated with a new nonself-aligned (NSA) structure based on 0.18 /spl mu/m technology. This NSA structure has a low-complexity emitter and extrinsic base process which reduces overall thermal cycle and minimizes transient enhanced diffusion. A low-power performance has been achieved which requires only 1 mA collector current to reach 200-GHz f/sub T/. The performance is a result of narrow base width and reduced parasitics in the device. Detailed comparison is made to a 120-GHz self-aligned production device.
ieee gallium arsenide integrated circuit symposium | 2001
Greg Freeman; Mounir Meghelli; Young H. Kwark; Steven J. Zier; Alexander V. Rylyakov; Michael A. Sorna; Todd Tanji; Oswin M. Schreiber; Keith M. Walter; Jae Sung Rieh; Basanth Jagannathan; Alvin J. Joseph; Seshadri Subbanna
Product designs for 40 Gbit/sec applications fabricated from SiGe BiCMOS technologies are now becoming available. This paper will briefly discuss technology aspects relating to HBT device operation at high speed, acting to dispel some common misconceptions regarding SiGe HBT technology applicability to 40 Gbit/sec circuits. The high speed portions of the 40 Gbit/sec system are then addressed individually, demonstrating substantial results toward product offerings, on each of the critical high speed elements.
IEEE Transactions on Microwave Theory and Techniques | 2004
Jae Sung Rieh; Basanth Jagannathan; David R. Greenberg; Mounir Meghelli; Alexander V. Rylyakov; Fernando Guarin; Zhijian Yang; David C. Ahlgren; Greg Freeman; Peter E. Cottrell; David L. Harame
The relatively less exploited terahertz band possesses great potential for a variety of important applications, including communication applications that would benefit from the enormous bandwidth within the terahertz spectrum. This paper overviews an approach toward terahertz applications based on SiGe heterojunction bipolar transistor (HBT) technology, focusing on broad-band communication applications. The design, characteristics, and reliability of SiGe HBTs exhibiting record f/sub T/ of 375 GHz and associated f/sub max/ of 210 GHz are presented. The impact of device optimization on noise characteristics is described for both low-frequency and broad-band noise. Circuit implementations of SiGe technologies are demonstrated with selected circuit blocks for broad-band communication systems, including a 3.9-ps emitter coupled logic ring oscillator, a 100-GHz frequency divider, 40-GHz voltage-controlled oscillator, and a 70-Gb/s 4:1 multiplexer. With no visible limitation for further enhancement of device speed at hand, the march toward terahertz band with Si-based technology will continue for the foreseeable future.
topical meeting on silicon monolithic integrated circuits in rf systems | 2001
Jae Sung Rieh; David R. Greenberg; Basanth Jagannathan; G. Freeman; Seshadri Subbanna
Thermal resistance has been measured for high speed SiGe HBTs with various emitter widths and lengths. The smaller devices exhibited higher thermal resistance values, but eventually resulted in lower junction temperature rise for a given power density. A physical model has been developed which showed good agreement with the measurements. The model indicates that the thermal resistance depends strongly on the deep trench geometry. The thermal resistance is also anticipated to increase with the existence of adjacent devices due to a heat dissipation interference, according to the model.
IEEE Transactions on Electron Devices | 2003
Greg Freeman; Basanth Jagannathan; S.-J. Jeng; Jae Sung Rieh; Andreas D. Stricker; David C. Ahlgren; Seshadri Subbanna
SiGe HBT transistors achieving over 200 GHz f/sub T/ and f/sub MAX/ are demonstrated in this paper. Techniques and trends in SiGe HBT design are discussed. Processing techniques available to silicon technologies are utilized to minimize parasitic resistances and capacitances and thereby establish raw speeds exceeding III-V devices despite the higher mobility in those materials. Higher current densities and greater avalanche currents, which are required for establishing such high performance, are discussed as they relate to device self-heating and reliability and the degradation of the devices. Simple circuit results are shown, demonstrating 4.2-ps ring-oscillator delays.
international electron devices meeting | 1999
G. Freeman; David C. Ahlgren; David R. Greenberg; R. Groves; F. Huang; G. Hugo; Basanth Jagannathan; S.-J. Jeng; J. Johnson; Kathryn T. Schonenberg; Kenneth J. Stein; Richard P. Volant; Seshadri Subbanna
We present a self-aligned, 0.18 /spl mu/m emitter width SiGe HBT with f/sub T/ of 90 GHz, f/sub MAX/ of 90 GHz (both at V/sub CB/=0.5 V), NF/sub MIN/ of 0.4 dB, and BV/sub CEO/ of 2.7 V. We also demonstrate that this device is integrable with IBMs 0.18 /spl mu/m, 1.8/3.3 V copper metallization CMOS technology with little effect on the CMOS device properties and design rules.