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Featured researches published by G. Freeman.


IEEE Electron Device Letters | 2002

Self-aligned SiGe NPN transistors with 285 GHz f/sub MAX/ and 207 GHz f/sub T/ in a manufacturable technology

Basanth Jagannathan; Marwan H. Khater; Francois Pagette; Jae Sung Rieh; David Angell; Huajie Chen; J. Florkey; F. Golan; David R. Greenberg; R. Groves; S.-J. Jeng; Jeffrey B. Johnson; E. Mengistu; Kathryn T. Schonenberg; C.M. Schnabel; P. Smith; Andreas D. Stricker; David C. Ahlgren; G. Freeman; Kenneth J. Stein; Seshadri Subbanna

This paper reports on SiGe NPN HBTs with unity gain cutoff frequency (f/sub T/) of 207 GHz and an f/sub MAX/ extrapolated from Masons unilateral gain of 285 GHz. f/sub MAX/ extrapolated from maximum available gain is 194 GHz. Transistors sized 0.12/spl times/2.5 /spl mu/m/sup 2/ have these characteristics at a linear current of 1.0 mA//spl mu/m (8.3 mA//spl mu/m/sup 2/). Smaller transistors (0.12/spl times/0.5 /spl mu/m/sup 2/) have an f/sub T/ of 180 GHz at 800 /spl mu/A current. The devices have a pinched base sheet resistance of 2.5 k/spl Omega//sq. and an open-base breakdown voltage BV/sub CEO/ of 1.7 V. The improved performance is a result of a new self-aligned device structure that minimizes parasitic resistance and capacitance without affecting f/sub T/ at small lateral dimensions.


international electron devices meeting | 2002

SiGe HBTs with cut-off frequency of 350 GHz

Jae Sung Rieh; Basanth Jagannathan; H.-C. Chen; Kathryn T. Schonenberg; David Angell; Anil K. Chinthakindi; J. Florkey; F. Golan; David R. Greenberg; S.-J. Jeng; Marwan H. Khater; Francois Pagette; Christopher M. Schnabel; P. Smith; Andreas D. Stricker; K. Vaed; Richard P. Volant; David C. Ahlgren; G. Freeman; Kenneth J. Stein; Seshadri Subbanna

This work reports on SiGe HBTs with f/sub T/ of 350 GHz. This is the highest reported f/sub T/ for any Si-based transistor as well as any bipolar transistor. Associated f/sub max/ is 170 GHz, and BV/sub CEO/ and BV/sub CBO/ are measured to be 1.4 V and 5.0 V, respectively. Also achieved was the simultaneous optimization of f/sub T/ and f/sub max/ resulting in 270 GHz and 260 GHz, with BV/sub CEO/ and BV/sub CBO/ of 1.6 V and 5.5 V, respectively. The dependence of device performance on bias condition and device dimension has been investigated. Considerations regarding the extraction of such high f/sub T/ and f/sub max/ values are also discussed.


IEEE Transactions on Electron Devices | 2001

Current status and future trends of SiGe BiCMOS technology

David L. Harame; David C. Ahlgren; Douglas D. Coolbaugh; James S. Dunn; G. Freeman; John D. Gillis; Robert A. Groves; Gregory N. Hendersen; Robb Allen Johnson; Alvin J. Joseph; Seshardi Subbanna; Alan M. Victor; Kimball M. Watson; Charles S. Webster; P.J. Zampardi

The silicon germanium (SiGe) heterojunction bipolar transistor (HBT) marketplace covers a wide range of products and product requirements, particularly when combined with CMOS in a BiCMOS technology. A new base integration approach is presented which decouples the structural and thermal features of the HBT from the CMOS. The trend is to use this approach for future SiGe technologies for easier migration to advanced CMOS technology generations. Lateral and vertical scaling are used to achieve smaller and faster SiGe HBT devices with greatly increased current densities. Improving both the f/sub T/ and f/sub MAX/ will be a significant challenge as the collector and base dopant concentrations are increased. The increasing current densities of the SiGe HBT will put more emphasis on interconnects as a key factor in limiting transistor layout. Capacitors and inductors are two very important passives that must improve with each generation. The trend toward increasing capacitance in polysilicon-insulator-silicon (MOSCAP), polysilicon-insulator-polysilicon (Poly-Poly), and metal-insulator-metal (MIM) capacitors is discussed. The trend in VLSI interconnections toward thinner interlevel dielectrics and metallization layers is counter to the requirements of high Q inductors, potentially requiring a custom last metallization layer.


bipolar/bicmos circuits and technology meeting | 2001

A 0.18 /spl mu/m BiCMOS technology featuring 120/100 GHz (f/sub T//f/sub max/) HBT and ASIC-compatible CMOS using copper interconnect

Alvin J. Joseph; D. Coolbaugh; Michael J. Zierak; R. Wuthrich; Peter J. Geiss; Zhong-Xiang He; Xuefeng Liu; Bradley A. Orner; Jeffrey B. Johnson; G. Freeman; David C. Ahlgren; Basanth Jagannathan; Louis D. Lanzerotti; John C. Malinowski; Huajie Chen; J. Chu; Peter B. Gray; Robb Allen Johnson; James S. Dunn; Seshadri Subbanna; Kathryn T. Schonenberg; David L. Harame; R. Groves; K. Watson; D. Jadus; M. Meghelli; A. Rylyakov

A BiCMOS technology is presented that integrates a high performance NPN (f/sub T/=120 GHz and f/sub max/=100 GHz), ASIC compatible 0.11 /spl mu/m L/sub eff/ CMOS, and a full suite of passive elements. Significant HBT performance enhancement compared to previously published results has been achieved through further collector and base profile optimization guided by process and device simulations. Base transit time reduction was achieved by simultaneously increasing the Ge ramp and by limiting the base diffusion with the addition of carbon doping to SiGe epitaxial base. This paper describes IBMs next generation SiGe BiCMOS production technology targeted at the communications market.


international electron devices meeting | 2004

SiGe HBT technology with f/sub max//f/sub T/=350/300 GHz and gate delay below 3.3 ps

Marwan H. Khater; Jae Sung Rieh; Thomas N. Adam; Anil K. Chinthakindi; J. Johnson; Rajendran Krishnasamy; M. Meghelli; Francois Pagette; D. Sanderson; Christopher M. Schnabel; Kathryn T. Schonenberg; P. Smith; Kenneth J. Stein; A. Strieker; S.-J. Jeng; David C. Ahlgren; G. Freeman

This work reports on SiGe HBT technology with f/sub max/ and f/sub T/ of 350 GHz and 300 GHz, respectively, and a gate delay below 3.3 ps. This is the highest reported speed for any Si-based transistor in terms of combined performance of f/sub max/ and f/sub T/ both of which exhibit 300 GHz and above. Associated BV/sub CEO/ and BV/sub CBO/ are measured to be 1.7 V and 5.6 V, respectively. The dependence of device performance on bias condition and device dimension has been investigated. Considerations regarding the extraction of such high f/sub max/ and f/sub T/ values are also discussed.


IEEE Electron Device Letters | 2001

A 210-GHz f/sub T/ SiGe HBT with a non-self-aligned structure

S.-J. Jeng; Basanth Jagannathan; Jae Sung Rieh; Jeffrey B. Johnson; Kathryn T. Schonenberg; David R. Greenberg; Andreas D. Stricker; Huajie Chen; Marwan H. Khater; David C. Ahlgren; G. Freeman; Kenneth J. Stein; Seshadri Subbanna

A record 210-GHz f/sub T/ SiGe heterojunction bipolar transistor at a collector current density of 6-9 mA//spl mu/m/sup 2/ is fabricated with a new nonself-aligned (NSA) structure based on 0.18 /spl mu/m technology. This NSA structure has a low-complexity emitter and extrinsic base process which reduces overall thermal cycle and minimizes transient enhanced diffusion. A low-power performance has been achieved which requires only 1 mA collector current to reach 200-GHz f/sub T/. The performance is a result of narrow base width and reduced parasitics in the device. Detailed comparison is made to a 120-GHz self-aligned production device.


Ibm Journal of Research and Development | 2003

Foundation of rf CMOS and SiGe BiCMOS technologies

James S. Dunn; David C. Ahlgren; Douglas D. Coolbaugh; Natalie B. Feilchenfeld; G. Freeman; David R. Greenberg; Robert A. Groves; Fernando Guarin; Youssef Hammad; Alvin J. Joseph; Louis D. Lanzerotti; Stephen A. St. Onge; Bradley A. Orner; Jae Sung Rieh; Kenneth J. Stein; Steven H. Voldman; Ping-Chuan Wang; Michael J. Zierak; Seshadri Subbanna; David L. Harame; Dean A. Herman; Bernard S. Meyerson

This paper provides a detailed description of the IBM SiGe BiCMOS and rf CMOS technologies. The technologies provide high-performance SiGe heterojunction bipolar transistors (HBTs) combined with advanced CMOS technology and a variety of passive devices critical for realizing an integrated mixed-signal system-on-a-chip (SoC). The paper reviews the process development and integration methodology, presents the device characteristics, and shows how the development and device selection were geared toward usage in mixed-signal IC development.


international electron devices meeting | 1996

Manufacturability demonstration of an integrated SiGe HBT technology for the analog and wireless marketplace

David C. Ahlgren; M. Gilbert; David R. Greenberg; J. Jeng; John C. Malinowski; D. Nguyen-Ngoc; Kathryn T. Schonenberg; Kenneth J. Stein; R. Groves; K. Walter; G. Hueckel; D. Colavito; G. Freeman; D.A. Sunderland; David L. Harame; Bernard S. Meyerson

Early production results are reviewed for IBMs integrated SiGe HBT technology. With a sample size of over 200 wafers, statistical control of key HBT parameters (F/sub T/, F/sub max/, R/sub bb/, R/sub bi/, /spl beta/) and other supporting devices, and benchmark circuit performance are shown. HBT device yield and reliability on 200 mm wafers are presented, demonstrating that the SiGe HBT is capable of meeting manufacturing requirement for the high performance wireless communications marketplace.


topical meeting on silicon monolithic integrated circuits in rf systems | 2001

Measurement and modeling of thermal resistance of high speed SiGe heterojunction bipolar transistors

Jae Sung Rieh; David R. Greenberg; Basanth Jagannathan; G. Freeman; Seshadri Subbanna

Thermal resistance has been measured for high speed SiGe HBTs with various emitter widths and lengths. The smaller devices exhibited higher thermal resistance values, but eventually resulted in lower junction temperature rise for a given power density. A physical model has been developed which showed good agreement with the measurements. The model indicates that the thermal resistance depends strongly on the deep trench geometry. The thermal resistance is also anticipated to increase with the existence of adjacent devices due to a heat dissipation interference, according to the model.


Proceedings of the IEEE | 2005

Scaling of SiGe Heterojunction Bipolar Transistors

Jae Sung Rieh; David R. Greenberg; Andreas D. Stricker; G. Freeman

Scaling has been the principal driving force behind the successful technology innovations of the past half-century. This paper investigates the impacts of scaling on SiGe heterojunction bipolar transistors (HBTs), which have recently emerged as a strong contender for RF and mixed-signal applications. The impacts of scaling on key performance metrics such as speed and noise are explored, and both theory and data show that scaling, both vertical and lateral, has mostly beneficial effects on these metrics. However, it is shown that the scaled devices are increasingly vulnerable to device reliability issues due to increased electric field and operation current density. Bipolar transistor scaling rules are reviewed and compared with accumulated reported data for verification. A review of scaling limits suggests that bipolar scaling has not reached the physical fundamental limit yet, promising a continued improvement of bipolar performance in the foreseeable future.

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