Paul R. Hart

A 350 W, 790 to 960 MHz wideband LDMOS doherty amplifier using a modified combining scheme

A modified Doherty combining scheme is proposed that eases the impedance matching requirement and enables excellent AM/AM, AM/PM, and wide bandwidth in practical designs. A 350 W, 790 to 960 MHz symmetrical LDMOS Doherty amplifier measured 20 to 21 dB gain as well as peak and back-off efficiencies of 56% to 61% and 48% to 50% respectively across the band. The amplifier achieved excellent linearization results when driven with wideband 20 and 50 MHz WCDMA signals and a 35 MHz GMSK signal.

Improving loadpull measurement time by intelligent measurement interpolation and surface modeling techniques

In this paper we show how a thin-plate spline approximation can be used to generate a model of the measured response surface of a load-pull measurement over a much-reduced number of impedance points with no significant loss of accuracy. Further, interpolation between these model surfaces is possible, generating accurate drive-up characteristics. This has enabled accurate load-pull characterizations to be made in a fraction of the usual time.

A linear 250 watt Doherty power amplifier based on two-stage power ICs for 1.8 GHz single and multi-carrier GSM applications

In this paper we describe the design and measured performance of a Doherty power amplifier constructed using two-stage power amplifier IC building blocks. The Doherty PA was designed for single- and multi-carrier GSM applications in the 1800 MHz band. The 3-dB compression point of the amplifier is 54 dBm, and the PA displays excellent raw linearity for use in single-carrier GSM applications. Using a commercial digital predistortion system, the amplifier provides power output of 47 dBm at −70 dBc correction with a two-carrier GSM signal, and 45.5 dBm at −60 dBc correction with a four-carrier GSM signal.

A 350W, 2GHz, 44% efficient LDMOS power amplifier design with capability to handle a wideband 65MHz envelope signal

In this paper we demonstrate high gain, high efficiency, single and balanced Doherty power amplifiers (PAs) that have the ability to transmit signals which occupy the full frequency band from 1930MHz–1995MHz. The PAs have been designed using a new generation of Freescale LDMOS power transistors [1], in which the drain side video-bandwidth (VBW) has been enhanced. For the first time we will show the ability of the PA to handle wideband envelope signals (> 80MHz) with excellent nonlinearity correction using Digital Pre-distortion (DPD). Narrow band as well as wideband DPD measurement results will be presented for single and balanced Doherty PAs including driver stages. These RF Doherty PAs are targeted for use in next generation wideband wireless communication systems.

Load-Pull Measurements Using Modulated Signals

In this paper we report a method of applying digitally modulated signals to an RF power transistor in a load-pull system. This methodology ensures that the transistor experiences realistic thermal conditions, as well as realistic electrical conditions during test. The measured data is then sliced at constant value of CCDF enabling meaningful performance comparisons to be made between devices and technologies

Behavioral modeling of Si LDMOS pre-matched devices with application to Doherty power amplifiers

Development of an experimental behavioral model to describe the non-linear characteristics of high power internally pre-matched LDMOS power transistors is presented. The model is developed by characterizing the device with swept power load-pull measurements across a large load impedance plane with the input impedance set at a pre-determined state. Based on measurements of complex input and output voltages at the devices package terminals, a functional representation is adopted to express the devices complex gain with respect to RF input voltage (or available source power) and the devices load terminating impedance. It is further shown that this approach can be used to independently model high power LDMOS pre-matched devices biased at Class-A/B and -C for use in simulating a complete Doherty power amplifier circuit. Simulations of a 300W Doherty power amplifier using this approach are contrasted to more conventional compact device models with excellent agreement noted across a large output power range. Hence, when compact models are unavailable, a behavioral one can be formulated from load pull measurements on the devices of interest.