Benjamin Busze

A 2.4 GHz ULP OOK Single-Chip Transceiver for Healthcare Applications

This paper describes an ultra-low power (ULP) single chip transceiver for wireless body area network (WBAN) applications. It supports on-off keying (OOK) modulation, and it operates in the 2.36-2.4 GHz medical BAN and 2.4-2.485 GHz ISM bands. It is implemented in 90 nm CMOS technology. The direct modulated transmitter transmits OOK signal with 0 dBm peak power, and it consumes 2.59 mW with 50% OOK. The transmitter front-end supports up to 10 Mbps. The transmitter digital baseband enables digital pulse-shaping to improve spectrum efficiency. The super-regenerative receiver front-end supports up to 5 Mbps with -75 dBm sensitivity. Including the digital part, the receiver consumes 715 μW at 1 Mbps data rate, oversampled at 3 MHz. At the system level the transceiver achieves PER=10 -2 at 25 meters line of site with 62.5 kbps data rate and 288 bits packet size. The transceiver is integrated in an electrocardiogram (ECG) necklace to monitor the hearts electrical property.

A meter-range UWB transceiver chipset for around-the-head audio streaming

Any around-the-body wireless system faces challenging requirements. This is especially true in the case of audio streaming around the head e.g. for wireless audio headsets or hearing-aid devices. The behind-the-ear device typically serves multiple radio links e.g. ear-to-ear, ear-to-pocket (a phone or MP3 player) or even a link between the ear and a remote base station such as a TV. Good audio quality is a prerequisite and mW-range power consumption is compulsory in view of battery size. However, the GHz communication channel typically shows a significant attenuation; for an ear-to-ear link, the attenuation due to the narrowband fade dominates and is in the order of 55 to 65dB [1]. The typically small antennas, close to the human body, add another 10 to 15dB of losses. For the ear-to-pocket and the ear-to-remote link, the losses due to body proximity and antenna size reduce, however the distance increases resulting in a similar link budget requirement of 80dB.

A 15-Channel Digital Active Electrode System for Multi-Parameter Biopotential Measurement

This paper presents a digital active electrode (DAE) system for multi-parameter biopotential signal acquisition in portable and wearable devices. It is built around an IC that performs analog signal processing and digitization with the help of on-chip instrumentation amplifiers, a 12 bit ADC and a digital interface. Via a standard I2C bus, up to 16 digital active electrodes (15-channels) can be connected to a commercially available microcontroller, thus significantly reducing system complexity and cost. In addition, the DAE utilizes an innovative functionally DC-coupled amplifier to preserve input DC signal, while still achieving state-of-the-art performance: 60 nV/sqrt(Hz) input-referred noise and ±350 mV electrode-offset tolerance. A common-mode feedforward scheme improves the CMRR of an AE pair from 40 dB to maximum 102 dB.

A 0.47–1.6 mW 5-bit 0.5–1 GS/s Time-Interleaved SAR ADC for Low-Power UWB Radios

This paper presents a 16-channel time-interleaved 5-bit asynchronous SAR ADC for UWB radios. It proposes 400 aF unit capacitors, offset calibration, a self-resetting comparator and a distributed clock divider to optimize the performance. The prototype in 90 nm CMOS occupies only 0.11 mm2 including decoupling capacitors. Two relevant modes for UWB are supported: 0.5 GS/s at 0.75 V supply, and 1 GS/s at 1 V supply with 0.47 mW and 1.6 mW power consumption respectively. With an ENOB of 4.7 and 4.8 bits, this leads to energy efficiencies of 36 and 57 fJ/conversion-step. Compared to prior-art, state-of-the-art efficiency is achieved without relying on complex calibration schemes.

13.2 A 3.7mW-RX 4.4mW-TX fully integrated Bluetooth Low-Energy/IEEE802.15.4/proprietary SoC with an ADPLL-based fast frequency offset compensation in 40nm CMOS

This paper presents an ultra-low-power (ULP) fully-integrated Bluetooth Low-Energy(BLE)/IEEE802.15.4/proprietary RF SoC for Internet-of-Things applications. Ubiquitous wireless sensors connected through cellular devices are becoming widely used in everyday life. A ULP RF transceiver is one of the most critical components that enables these emerging applications, as it can consume up to 90% of total battery energy. Furthermore, a low-cost radio design with an area-efficient fully integrated RF SoC is an important catalyst for developing such applications. By employing a low-voltage digital-intensive architecture, the presented SoC is fully compliant with BLE and IEEE802.15.4 PHY/Data-link requirements and achieves state-of-the-art power consumption of 3.7mW for RX and 4.4mW for TX.

26.2 A 5.5fJ/conv-step 6.4MS/S 13b SAR ADC utilizing a redundancy-facilitated background error-detection-and-correction scheme

Wireless standards, e.g., 802.15.4g, need high-resolution ADCs (>10b) with very low power and MS/s sampling rates. The SAR ADC is well known for its excellent power efficiency. However, its intrinsic accuracy (DAC matching) is limited up to 10 to 12b in modern CMOS technologies [1]. Scaling up the device dimensions can improve matching but it deteriorates power-efficiency and speed. Alternatively, calibrations [2-5] are introduced to correct errors (e.g., comparator offset and capacitor mismatch) and push the SNDR beyond 62dB. However, most of the calibrations [2-4] are implemented off-chip and the power for the calibration circuit is relatively high when implemented on-chip. Foreground calibration [4-5] is an alternative but is sensitive to environmental changes. We report a low-power fully automated on-chip background calibration that uses a redundancy-facilitated error-detection-and-correction scheme. Thanks to the low-power calibration, this ADC achieves an ENOB of 10.4b and a power efficiency of 5.5fJ/conv-step at 6.4MS/S.

A 0.47–1.6mW 5bit 0.5–1GS/s time-interleaved SAR ADC for low-power UWB radios

This paper presents a 16-channel time-interleaved 5-bit asynchronous SAR ADC for UWB radios. It proposes 400aF unit capacitors, offset calibration, a self-resetting comparator and a distributed clock divider to optimize the performance. The prototype in 90nm CMOS occupies only 0.11mm2 including decoupling capacitors. Two relevant modes for UWB are supported: 0.5GS/s at 0.75V supply, and 1GS/s at 1V supply with 0.47mW and 1.6mW power consumption respectively. With an ENOB of 4.7 and 4.8bit, this leads to energy efficiencies of 36 and 57fJ/conversion-step. Compared to prior-art, state-of-the-art efficiency is achieved without relying on complex calibration schemes.

A 0.33 nJ/bit IEEE802.15.6/Proprietary MICS/ISM Wireless Transceiver With Scalable Data Rate for Medical Implantable Applications

This paper presents an ultra-low power wireless transceiver specialized for but not limited to medical implantable applications. It operates at the 402-405-MHz medical implant communication service band, and also supports the 420-450-MHz industrial, scientific, and medical band. Being IEEE 802.15.6 standard compliant with additional proprietary modes, this highly configurable transceiver achieves date rates from 11 kb/s to 4.5 Mb/s, which covers the requirements of conventional implantable applications. The phase-locked loop-based transmitter architecture is adopted to support various modulation schemes with limited power budget. The zero-IF receiver has programmable gain and bandwidth to accommodate different operation modes. Fabricated in 40-nm CMOS technology with 1-V supply, this transceiver only consumes 1.78 mW for transmission and 1.49 mW for reception. The ultra-low power consumption together with the 15.6-compliant performance in term of modulation accuracy, sensitivity, and interference robustness make this transceiver competent for various implantable applications.

10.6 A 0.74V 200μW multi-standard transceiver digital baseband in 40nm LP-CMOS for 2.4GHz Bluetooth Smart / ZigBee / IEEE 802.15.6 personal area networks

Ultra-low-power (ULP), short-range wireless connectivity is becoming increasingly relevant to a wide range of sensor and actuator node applications, ranging from consumer lifestyle to medical applications. In recent years, a multitude of wireless standards has been proposed to meet differing requirements of individual application domains such as data rates, range, QoS, peak and average power consumption. From a commercial perspective, a single radio component that is capable of supporting multiple wireless standards - targeting multiple application domains/markets - while reducing integration costs is highly preferable. At the same time, the multi-standard support may not compromise low-power operation or silicon area.

26.3 A 1.3nJ/b IEEE 802.11ah fully digital polar transmitter for IoE applications

This paper presents an ultra-low-power (ULP) IEEE 802.11ah fully-digital polar transmitter (TX). IEEE 802.11ah is a new Wi-Fi protocol optimized for Internet-of-Everything (IoE) applications. Compared to other IoE standards like Bluetooth or ZigBee, its sub-GHz carrier frequency and mandatory modes with 1MHz/2MHz channel bandwidths allow devices to operate in a longer range with scalable data-rates from 150kb/s to 2.1Mb/s. Moreover, the use of OFDM improves link robustness against fading, especially in urban environments, and achieves a higher spectral efficiency. The key design challenges of an IEEE 802.11ah TX for IoE applications are to meet the tight spectral mask and error-vector-magnitude (EVM) requirements as for conventional Wi-Fi standards (e.g., 802.11n/g), while achieving low power consumption required by IoE applications. The presented TX applies a fully-digital polar architecture with a 1V supply, and it achieves more than 10× power reduction compared to the state-of-the-art OFDM transceivers [1-4]. Without any complicated PA pre-distortion techniques as in [5], it passes all the PHY requirements of the mandatory modes in IEEE 802.11ah with 4.4% EVM, while consuming 7.1mW with 0dBm output power.